| Uncovering in-dram rowhammer protection mechanisms: A new methodology, custom rowhammer patterns, and implications H Hassan, YC Tugrul, JS Kim, V Van der Veen, K Razavi, O Mutlu MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 88 | 2021 |
| Rowpress: Amplifying read disturbance in modern dram chips H Luo, A Olgun, AG Yağlıkçı, YC Tuğrul, S Rhyner, MB Cavlak, ... Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 37 | 2023 |
| DRAM bender: An extensible and versatile FPGA-based infrastructure to easily test state-of-the-art DRAM chips A Olgun, H Hassan, AG Yağlıkçı, YC Tuğrul, L Orosa, H Luo, M Patel, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 22 | 2023 |
| An experimental analysis of RowHammer in HBM2 DRAM chips A Olgun, M Osseiran, AG Yağlıkçı, YC Tuğrul, H Luo, S Rhyner, B Salami, ... 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems …, 2023 | 17 | 2023 |
| Abacus: All-bank activation counters for scalable and low overhead rowhammer mitigation A Olgun, YC Tugrul, N Bostanci, IE Yuksel, H Luo, S Rhyner, AG Yaglikci, ... USENIX Security, 2024 | 9 | 2024 |
| Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis İE Yüksel, YC Tuğrul, A Olgun, FN Bostancı, AG Yağlıkçı, GF Oliveira, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 5 | 2024 |
| Sectored DRAM: An energy-efficient high-throughput and practical fine-grained DRAM architecture A Olgun, F Bostanci, GF Oliveira, YC Tugrul, R Bera, AG Yaglikci, ... arXiv preprint arXiv:2207.13795, 2022 | 5 | 2022 |
| CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost FN Bostanci, ISE Yüksel, A Olgun, K Kanellopoulos, YC Tuğrul, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 4 | 2024 |
| Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions AG Yağlıkçı, YC Tuğrul, GF Oliveira, İE Yüksel, A Olgun, H Luo, O Mutlu 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 4 | 2024 |
| PULSAR: Simultaneous many-row activation for reliable and high-performance computing in off-the-shelf DRAM chips IE Yuksel, YC Tugrul, F Bostanci, AG Yaglikci, A Olgun, GF Oliveira, ... arXiv preprint arXiv:2312.02880, 2023 | 4 | 2023 |
| Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator H Luo, YC Tu, FN Bostancı, A Olgun, AG Ya, O Mutlu IEEE Computer Architecture Letters, 2023 | 4 | 2023 |
| TuRaN: True random number generation using supply voltage underscaling in SRAMs İE Yüksel, A Olgun, B Salami, F Bostancı, YC Tuğrul, AG Yağlıkçı, ... arXiv preprint arXiv:2211.10894, 2022 | 3 | 2022 |
| Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips A Olgun, M Osseiran, AG Yaglikci, YC Tugrul, H Luo, S Rhyner, B Salami, ... arXiv preprint arXiv:2310.14665, 2023 | 2 | 2023 |
| Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations O Canpolat, AG Yağlıkçı, A Olgun, İE Yüksel, YC Tuğrul, K Kanellopoulos, ... arXiv preprint arXiv:2404.13477, 2024 | 1 | 2024 |
| RowPress Vulnerability in Modern DRAM Chips H Luo, A Olgun, AG Yağlıkçı, YC Tuğrul, S Rhyner, MB Cavlak, ... IEEE Micro, 2024 | | 2024 |
| Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis IE Yuksel, YC Tugrul, F Bostanci, GF Oliveira, AG Yaglikci, A Olgun, ... arXiv preprint arXiv:2405.06081, 2024 | | 2024 |
| CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost F Nisa Bostanci, IE Yuksel, A Olgun, K Kanellopoulos, YC Tugrul, ... arXiv e-prints, arXiv: 2402.18769, 2024 | | 2024 |
| Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions A Giray Yağlıkçı, YC Tuğrul, GF Oliveira, İE Yüksel, A Olgun, H Luo, ... arXiv e-prints, arXiv: 2402.18652, 2024 | | 2024 |
| Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture A Olgun, F Bostanci, G Francisco de Oliveira Junior, YC Tugrul, R Bera, ... ACM Transactions on Architecture and Code Optimization, 2024 | | 2024 |
| DEV-PIM: Dynamic Execution Validation with Processing-in-Memory A Bolat, YC Tuğrul, SH Çelik, S Sezer, M Ottavi, O Ergin 2023 IEEE European Test Symposium (ETS), 1-6, 2023 | | 2023 |
