31.2 CIM-spin: A 0.5-to-1.2 V scalable annealing processor using digital compute-in-memory spin operators and register-based spins for combinatorial optimization problems Y Su, H Kim, B Kim 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 480-482, 2020 | 30 | 2020 |
Flexspin: A scalable CMOS Ising machine with 256 flexible spin processing elements for solving complex combinatorial optimization problems Y Su, TTH Kim, B Kim 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 17 | 2022 |
A scalable cmos ising computer featuring sparse and reconfigurable spin interconnects for solving combinatorial optimization problems Y Su, J Mu, H Kim, B Kim IEEE Journal of Solid-State Circuits 57 (3), 858-868, 2022 | 17 | 2022 |
CIM-spin: A scalable CMOS annealing processor with digital in-memory spin operators and register spins for combinatorial optimization problems Y Su, H Kim, B Kim IEEE Journal of Solid-State Circuits 57 (7), 2263-2273, 2022 | 13 | 2022 |
A 20x28 spins hybrid in-memory annealing computer featuring voltage-mode analog spin operator for solving combinatorial optimization problems J Mu, Y Su, B Kim 2021 Symposium on VLSI Technology, 1-2, 2021 | 9 | 2021 |
A reconfigurable lsing machine for Boolean satisfiability problems featuring many-body spin interactions Y Su, TTH Kim, B Kim 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 3 | 2023 |
A 32x32 Time-Domain Wavefront Computing Accelerator for Path Planning and Scientific Simulations C Yu, Y Su, J Lee, K Chai, B Kim 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 3 | 2021 |
A 252 spins scalable CMOS Ising chip featuring sparse and reconfigurable spin interconnects for combinatorial optimization problems Y Su, J Mu, H Kim, B Kim 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 3 | 2021 |
A reconfigurable CMOS ising machine with three-body spin interactions for solving boolean satisfiability with direct mapping Y Su, TTH Kim, B Kim IEEE Solid-State Circuits Letters, 2023 | 2 | 2023 |
A 16× 128 stochastic-binary processing element array for accelerating stochastic dot-product computation using 1-16 bit-stream length Q Chen, Y Su, H Kim, T Yoo, TTH Kim, B Kim 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 678-681, 2020 | 2 | 2020 |
A Time-Domain Wavefront Computing Accelerator With a 32 32 Reconfigurable PE Array C Yu, J Mu, Y Su, KTC Chai, TTH Kim, B Kim IEEE Journal of Solid-State Circuits, 2023 | 1 | 2023 |
FlexSpin: A CMOS Ising Machine With 256 Flexible Spin Processing Elements With 8-b Coefficients for Solving Combinatorial Optimization Problems Y Su, TTH Kim, B Kim IEEE Journal of Solid-State Circuits, 2024 | | 2024 |