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Mario Garcia Valderas
Mario Garcia Valderas
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Autonomous fault emulation: A new FPGA-based acceleration system for hardness evaluation
C Lopez-Ongil, M Garcia-Valderas, M Portela-Garcia, L Entrena
IEEE Transactions on Nuclear Science 54 (1), 252-261, 2007
1692007
Soft error sensitivity evaluation of microprocessors by multilevel emulation-based fault injection
L Entrena, M Garcia-Valderas, R Fernandez-Cardenal, A Lindoso, ...
IEEE Transactions on Computers 61 (3), 313-322, 2010
1452010
Using benchmarks for radiation testing of microprocessors and FPGAs
H Quinn, WH Robinson, P Rech, M Aguirre, A Barnard, M Desogus, ...
IEEE Transactions on Nuclear Science 62 (6), 2547-2554, 2015
1142015
Partial TMR in FPGAs using approximate logic circuits
AJ Sánchez-Clemente, L Entrena, M García-Valderas
IEEE Transactions on Nuclear Science 63 (4), 2233-2240, 2016
602016
A unified environment for fault injection at any design level based on emulation
C Lopez-Ongil, L Entrena, M Garcia-Valderas, M Portela, MA Aguirre, ...
IEEE Transactions on Nuclear Science 54 (4), 946-950, 2007
502007
Fault injection in modern microprocessors using on-chip debugging infrastructures
M Portela-Garcia, C Lopez-Ongil, MGG Valderas, L Entrena
IEEE Transactions on Dependable and Secure Computing 8 (2), 308-314, 2010
492010
A hybrid fault-tolerant LEON3 soft core processor implemented in low-end SRAM FPGA
A Lindoso, L Entrena, M García-Valderas, L Parra
IEEE Transactions on Nuclear Science 64 (1), 374-381, 2016
442016
SET emulation considering electrical masking effects
L Entrena, MG Valderas, RF Cardenal, MP Garcia, CL Ongil
IEEE Transactions on Nuclear Science 56 (4), 2021-2025, 2009
442009
Logic masking for SET mitigation using approximate logic circuits
A Sanchez-Clemente, L Entrena, M García-Valderas, C López-Ongil
2012 IEEE 18th International On-Line Testing Symposium (IOLTS), 176-181, 2012
422012
A rapid fault injection approach for measuring seu sensitivity in complex processors
M Portela-Garcia, C Lopez-Ongil, M Garcia-Valderas, L Entrena
13th IEEE International On-Line Testing Symposium (IOLTS 2007), 101-106, 2007
382007
On the use of embedded debug features for permanent and transient fault resilience in microprocessors
M Portela-García, M Grosso, M Gallardo-Campos, MS Reorda, L Entrena, ...
Microprocessors and Microsystems 36 (5), 334-343, 2012
352012
An on-line fault detection technique based on embedded debug features
M Grosso, MS Reorda, M Portela-Garcia, M García-Valderas, ...
2010 IEEE 16th International On-Line Testing Symposium, 167-172, 2010
312010
Embedded emotion recognition within cyber-physical systems using physiological signals
JAM Calero, R Marino, JM Lanza-Gutierrez, T Riesgo, M Garcia-Valderas, ...
2018 Conference on design of circuits and integrated systems (DCIS), 1-6, 2018
302018
HW/SW co-simulation system for enhancing hardware-in-the-loop of power converter digital controllers
A Fernández-Álvarez, M Portela-García, M García-Valderas, J López, ...
IEEE Journal of Emerging and Selected Topics in Power Electronics 5 (4 …, 2017
282017
Autonomous transient fault emulation on FPGAs for accelerating fault grading
C López-Ongil, M García-Valderas, M Portela-Garcfa, L Entrena-Arrontes
11th IEEE International On-Line Testing Symposium, 43-48, 2005
242005
Online error detection through trace infrastructure in ARM microprocessors
M Peña-Fernandez, A Lindoso, L Entrena, M García-Valderas, Y Morilla, ...
IEEE Transactions on Nuclear Science 66 (7), 1457-1464, 2019
232019
SET emulation under a quantized delay model
M García Valderas, L Entrena, R Fernández Cardenal, C López Ongil, ...
Journal of Electronic Testing 25, 107-116, 2009
212009
Evaluation of the suitability of NEON SIMD microprocessor extensions under proton irradiation
A Lindoso, M García-Valderas, L Entrena, Y Morilla, P Martín-Holgado
IEEE Transactions on Nuclear Science 65 (8), 1835-1842, 2018
202018
The use of microprocessor trace infrastructures for radiation-induced fault diagnosis
M Peña-Fernandez, A Lindoso, L Entrena, M Garcia-Valderas
IEEE Transactions on Nuclear Science 67 (1), 126-134, 2019
192019
Dual-core lockstep enhanced with redundant multithread support and control-flow error detection
M Peña-Fernández, A Serrano-Cases, A Lindoso, M García-Valderas, ...
Microelectronics Reliability 100, 113447, 2019
182019
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