| Controlled kernel launch for dynamic parallelism in GPUs X Tang, A Pattnaik, H Jiang, O Kayiran, A Jog, S Pai, M Ibrahim, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 60 | 2017 |
| Efficient and fair multi-programming in GPUs via effective bandwidth management H Wang, F Luo, M Ibrahim, O Kayiran, A Jog 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 50 | 2018 |
| Architectural support for efficient large-scale automata processing H Liu, M Ibrahim, O Kayiran, S Pai, A Jog 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 24 | 2018 |
| Analyzing and leveraging remote-core bandwidth for enhanced performance in GPUs MA Ibrahim, H Liu, O Kayiran, A Jog 2019 28th International Conference on Parallel Architectures and Compilation …, 2019 | 21 | 2019 |
| Proactive scheduling for content pre-fetching in mobile networks O Shoukry, M Abd ElMohsen, J Tadrous, H El Gamal, T ElBatt, N Wanas, ... 2014 IEEE International Conference on Communications (ICC), 2848-2854, 2014 | 16 | 2014 |
| Analyzing and leveraging decoupled L1 caches in GPUs MA Ibrahim, O Kayiran, Y Eckert, GH Loh, A Jog 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 14 | 2021 |
| Analyzing and leveraging shared L1 caches in GPUs MA Ibrahim, O Kayiran, Y Eckert, GH Loh, A Jog Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 12 | 2020 |
| Adaptive cache reconfiguration via clustering MA Ibrahim, O Kayiran, Y Eckert, GH Loh US Patent 11,360,891, 2022 | 4 | 2022 |
| Address-stride assisted approximate load value prediction in GPUs H Wang, M Ibrahim, S Mittal, A Jog Proceedings of the ACM International Conference on Supercomputing, 184-194, 2019 | 4 | 2019 |
| Efficient Cache Utilization via Model-aware Data Placement for Recommendation Models MA Ibrahim, O Kayiran, S Aga Proceedings of the International Symposium on Memory Systems, 1-11, 2021 | 3 | 2021 |
| Collaborative Acceleration for FFT on Commercial Processing-In-Memory Architectures MA Ibrahim, S Aga arXiv preprint arXiv:2308.03973, 2023 | 2 | 2023 |
| Layer-wise Performance Bottleneck Analysis of Deep Neural Networks H Zhao, C Weinshenker, M Ibrahim, A Jog, J Zhao The 1st International Workshop on Architectures for Intelligent Machine, 2017 | 2 | 2017 |
| Just-in-time Quantization with Processing-In-Memory for Efficient ML Training MA Ibrahim, S Aga, A Li, S Pati, M Islam arXiv preprint arXiv:2311.05034, 2023 | 1 | 2023 |
| Distributing Model Data in Memories in Nodes in an Electronic Device MAAEM Ibrahim, O Kayiran, AGA Shaizeen US Patent App. 17/489,576, 2023 | 1 | 2023 |
| Paul: Proactive automated mobile user-centric content delivery MA Abd ElMohsen, OK Shoukry, H El Gamal, T ElBatt, NM Wanas, ... Proceeding of the 11th annual international conference on Mobile systems …, 2013 | 1 | 2013 |
| Balanced Data Placement for GEMV Acceleration with Processing-In-Memory MA Ibrahim, M Islam, S Aga arXiv preprint arXiv:2403.20297, 2024 | | 2024 |
| Bank-Level Parallelism for Processing in Memory M Islam, SD Aga, JR Alsop, MAAEM Ibrahim, NS Jayasena US Patent App. 17/953,723, 2024 | | 2024 |
| Reduction of Parallel Memory Operation Messages JR Alsop, SD Aga, MAAEM Ibrahim US Patent App. 17/954,671, 2024 | | 2024 |
| Filtered Responses of Memory Operation Messages JR Alsop, SD Aga, MAAE Ibrahim US Patent App. 17/954,748, 2024 | | 2024 |
| Virtually Padding Data Structures M Taassori, SD Aga, MAAEM Ibrahim, JR Alsop US Patent App. 17/899,231, 2024 | | 2024 |
Onur KayiranAMD;AMD Research;Verified email at amd.com
