Mladen Berekovic
Mladen Berekovic
Computer Engineering, TU Braunschweig
Vahvistettu sähköpostiosoite verkkotunnuksessa iti.uni-luebeck.de - Kotisivu
Nimike
Viittaukset
Viittaukset
Vuosi
Architectural exploration of the ADRES coarse-grained reconfigurable array
F Bouwens, M Berekovic, A Kanstein, G Gaydadjiev
International Workshop on Applied Reconfigurable Computing, 1-13, 2007
1252007
Architecture enhancements for the ADRES coarse-grained reconfigurable array
F Bouwens, M Berekovic, B De Sutter, G Gaydadjiev
International Conference on High-Performance Embedded Architectures and …, 2008
802008
Instruction set extensions for MPEG-4 video
M Berekovic, HJ Stolberg, MB Kulaczewski, P Pirsch, H Möller, H Runge, ...
Journal of VLSI signal processing systems for signal, image and video …, 1999
801999
Multicore system-on-chip architecture for MPEG-4 streaming video
M Berekovic, HJ Stolberg, P Pirsch
IEEE transactions on circuits and systems for video technology 12 (8), 688-699, 2002
652002
The M-PIRE MPEG-4 codec DSP and its macroblock engine
HJ Stolberg, M Berekovic, P Pirsch, H Runge, H Moller, J Kneip
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 2, 192-195, 2000
622000
Reconfigurable multi-processing coarse-grain array
A Kanstein, M Berekovic
US Patent 8,261,042, 2012
542012
The MPEG-4 multimedia coding standard: Algorithms, architectures and applications
S Bauer, J Kneip, T Mlasko, B Schmale, J Vollmer, A Hutter, M Berekovic
Journal of VLSI signal processing systems for signal, image and video …, 1999
521999
SoCRocket-A virtual platform for the European Space Agency's SoC development
T Schuster, R Meyer, R Buchty, L Fossati, M Berekovic
2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014
472014
Data-centric computing frontiers: A survey on processing-in-memory
P Siegl, R Buchty, M Berekovic
Proceedings of the Second International Symposium on Memory Systems, 295-308, 2016
442016
IDAMC: A many-core platform with run-time monitoring for mixed-criticality
B Motruk, J Diemer, R Buchty, R Ernst, M Berekovic
2012 IEEE 14th International Symposium on High-Assurance Systems Engineering …, 2012
422012
Adres & dresc: Architecture and compiler for coarse-grain reconfigurable processors
B Mei, M Berekovic, JY Mignolet
Fine-and coarse-grain reconfigurable computing, 255-297, 2007
402007
Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: The H. 264/AVC deblocking filter
C Arbelo, A Kanstein, S Lopez, JF López, M Berekovic, R Sarmiento, ...
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
372007
HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications
HJ Stolberg, M Berekovic, L Friebe, S Moch, S Flugel, X Mao, ...
2003 Design, Automation and Test in Europe Conference and Exhibition, 8-13 …, 2003
362003
An SoC with two multimedia DSPs and a RISC core for video compression applications
HJ Stolberg, S Moch, L Friebe, A Dehnhardt, MB Kulaczewski, ...
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
332004
Architecture of a coprocessor module for image compositing
M Berekovic, P Pirsch
1998 IEEE International Conference on Electronics, Circuits and Systems …, 1998
331998
MT-ADRES: Multithreading on coarse-grained reconfigurable architecture
K Wu, A Kanstein, J Madsen, M Berekovic
International Workshop on Applied Reconfigurable Computing, 26-38, 2007
272007
A core generator for fully synthesizable and highly parameterizable RISC-cores for system-on-chip designs
M Berekovic, D Heistermann, P Pirsch
1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and …, 1998
251998
Hardware realization of a Java virtual machine for high performance multimedia applications
M Berekovic, H Kloos, P Pirsch
1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and …, 1997
231997
NoC switch with credit based guaranteed service support qualified for GALS systems
T Kranich, M Berekovic
2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010
212010
Still image processing on coarse-grained reconfigurable array architectures
M Hartmann, VV Pantazis, T Vander Aa, M Berekovic, C Hochberger
Journal of Signal Processing Systems 60 (2), 225-237, 2010
202010
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Artikkelit 1–20