Energy-efficient deployment of distributed mobile sensor networks using fuzzy logic systems R Mathur, MK Sharma, A Misra, D Baveja 2009 International Conference on Advances in Computing, Control, and …, 2009 | 18 | 2009 |
Thermal analysis of a 3D stacked high-performance commercial microprocessor using face-to-face wafer bonding technology R Mathur, CJ Chao, R Liu, N Tadepalli, P Chandupatla, S Hung, X Xu, ... 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 541-547, 2020 | 17 | 2020 |
Thermal-aware design space exploration of 3-D systolic ML accelerators R Mathur, AKA Kumar, L John, JP Kulkarni IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 14 | 2021 |
A high-density logic-on-logic 3DIC design using face-to-face hybrid wafer-bonding on 12nm FinFET process S Sinha, S Hung, D Fisher, X Xu, C Chao, P Chandupatla, F Frederick, ... 2020 IEEE International Electron Devices Meeting (IEDM), 15.1. 1-15.1. 4, 2020 | 13 | 2020 |
Read assist circuitry for memory applications A Singh, V Asthana, M Rathore, A Goel, N Kaushik, R Ahuja, R Mathur, ... US Patent 10,854,280, 2020 | 10 | 2020 |
Buried Bitline for sub-5nm SRAM Design R Mathur, M Bhargava, S Salahuddin, P Schuddinck, J Ryckaert, ... 2020 IEEE International Electron Devices Meeting (IEDM), 20.2. 1-20.2. 4, 2020 | 9 | 2020 |
Buried interconnects for sub-5 nm SRAM design R Mathur, M Bhargava, B Cline, S Salahuddin, A Gupta, P Schuddinck, ... IEEE Transactions on Electron Devices 69 (3), 1041-1047, 2022 | 6 | 2022 |
Co-design of thermal management with system architecture and power management for 3D ICs R Roy, S Das, B Labbe, R Mathur, S Jeloka 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), 211-220, 2022 | 5 | 2022 |
Power delivery and thermal-aware arm-based multi-tier 3D architecture L Zhu, T Ta, R Liu, R Mathur, X Xu, S Das, A Kaul, A Rico, D Joseph, ... 2021 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2021 | 5 | 2021 |
System technology co-optimization and design challenges for 3D IC S Jeloka, B Cline, S Das, B Labbe, A Rico, R Herberholz, J DeLaCruz, ... 2022 IEEE Custom Integrated Circuits Conference (CICC), 1-6, 2022 | 4 | 2022 |
3D-split SRAM: Enabling generational gains in advanced CMOS R Mathur, M Bhargava, H Perry, A Cestero, F Frederick, S Hung, C Chao, ... 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 4 | 2021 |
Circuitry for tracking bias voltage behavior R Mathur, RR Challa, GP Narvekar US Patent 10,497,414, 2019 | 2 | 2019 |
Write assist circuitry A Goel, M Kumar, N Jindal, R Mathur, S Aggarwal, B Maiti, YK Chong US Patent 9,997,217, 2018 | 2 | 2018 |
Retention voltages for integrated circuits S Mangal, G Yeung, MJ Kinkade, R Mathur, BS Sandhu, GMN Lattimore US Patent 9,620,200, 2017 | 2 | 2017 |
Fuzzy Logic Based Deployment of Distributed Mobile Sensor Networks with Improved Energy-Efficiency MK Sharma, R Mathur, A Misra JCIS 1 (2), 45-53, 2011 | 2 | 2011 |
TSV coupled integrated circuits and methods R Mathur, X Xu, AW Chen, M Bhargava, BT Cline, SP Sinha US Patent 11,569,219, 2023 | 1 | 2023 |
CAM device with 3D CAM cells R Mathur, M Bhargava, S Jeloka, AW Chen US Patent 11,211,111, 2021 | 1 | 2021 |
Selective clock adjustment during read and/or write memory operations AW Chen, R Mathur, CN Dray, Y Sarrazin, JV Poitrat, Y Jallamion-Grive, ... US Patent 10,896,707, 2021 | 1 | 2021 |
Level shifter with bypass AW Chen, YK Chong, R Mathur, A Baradia, HY Chen US Patent 10,535,386, 2020 | 1 | 2020 |
Burst Read with Flexible Burst Length for On-Chip Memory EM McCombs, AD Tune, SJ Salisbury, R Mathur, HY Chen, ... US Patent App. 17/885,709, 2024 | | 2024 |