Seuraa
Alaa R. Alameldeen
Alaa R. Alameldeen
Simon Fraser University
Vahvistettu sähköpostiosoite verkkotunnuksessa cs.sfu.ca - Kotisivu
Nimike
Viittaukset
Viittaukset
Vuosi
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
MMK Martin, DJ Sorin, BM Beckmann, MR Marty, M Xu, AR Alameldeen, ...
ACM SIGARCH Computer Architecture News 33 (4), 92-99, 2005
20802005
Adaptive cache compression for high-performance processors
AR Alameldeen, DA Wood
Proceedings. 31st Annual International Symposium on Computer Architecture …, 2004
4222004
Trading off cache capacity for reliability to enable low voltage operation
C Wilkerson, H Gao, AR Alameldeen, Z Chishti, M Khellah, SL Lu
Computer Architecture, 2008. ISCA'08. 35th International Symposium on, 203-214, 2008
3652008
Variability in architectural simulations of multi-threaded workloads
AR Alameldeen, DA Wood
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
3442003
Frequent pattern compression: A significance-based compression scheme for L2 caches
AR Alameldeen, DA Wood
Dept. Comp. Scie., Univ. Wisconsin-Madison, Tech. Rep 1500, 2004
3382004
Estimating the selectivity of XML path expressions for internet scale applications
A Aboulnaga, AR Alameldeen, JF Naughton
VLDB 1, 591-600, 2001
3032001
Reducing cache power with low-cost, multi-bit error-correcting codes
C Wilkerson, AR Alameldeen, Z Chishti, W Wu, D Somasekhar, S Lu
Proceedings of the 37th annual international symposium on Computer …, 2010
2802010
Improving DRAM performance by parallelizing refreshes with accesses
KKW Chang, D Lee, Z Chishti, AR Alameldeen, C Wilkerson, Y Kim, ...
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
2442014
The efficacy of error mitigation techniques for DRAM retention failures: A comparative experimental study
S Khan, D Lee, Y Kim, AR Alameldeen, C Wilkerson, O Mutlu
ACM SIGMETRICS Performance Evaluation Review 42 (1), 519-532, 2014
2152014
Energy-efficient cache design using variable-strength error-correcting codes
AR Alameldeen, I Wagner, Z Chishti, W Wu, C Wilkerson, SL Lu
ACM SIGARCH Computer Architecture News 39 (3), 461-472, 2011
2142011
Improving cache lifetime reliability at ultra-low voltages
Z Chishti, AR Alameldeen, C Wilkerson, W Wu, SL Lu
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
2142009
IPC considered harmful for multiprocessor workloads
AR Alameldeen, DA Wood
IEEE Micro 26 (4), 8-17, 2006
2142006
Simulating a $2 M Commercial Server on a $2 K PC
AR Alameldeen, MMK Martin, CJ Mauer, KE Moore, M Xu, MD Hill, ...
Computer 36 (2), 50-57, 2003
2052003
Transparent hardware management of stacked dram as part of memory
J Sim, AR Alameldeen, Z Chishti, C Wilkerson, H Kim
Proceedings of the 47th Annual IEEE/ACM International Symposium on …, 2014
1402014
Evaluating non-deterministic multi-threaded commercial workloads
AR Alameldeen, CJ Mauer, M Xu, PJ Harper, MMK Martin, DJ Sorin, ...
Proceedings of the Fifth Workshop on Computer Architecture Evaluation Using …, 2002
1182002
Detecting and mitigating data-dependent DRAM failures by exploiting current memory content
S Khan, C Wilkerson, Z Wang, AR Alameldeen, D Lee, O Mutlu
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
1062017
Timestamp snooping: an approach for extending SMPs
MMK Martin, DJ Sorin, A Ailamaki, AR Alameldeen, RM Dickson, ...
Proceedings of the ninth international conference on Architectural support …, 2000
1022000
Interactions between compression and prefetching in chip multiprocessors
AR Alameldeen, DA Wood
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
982007
Improving cache performance by exploiting read-write disparity
S Khan, AR Alameldeen, C Wilkerson, O Mutlu, DA Jiménez
Proceedings of the 20th International Symposium on High Performance Computer …, 2014
85*2014
Hardware support for thread scheduling on multi-core processors
AR Alameldeen, ZA Chishti
US Patent 8,276,142, 2012
822012
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Artikkelit 1–20