Seuraa
Luca Cassano
Luca Cassano
Assistant Professor at Politecnico di Milano
Vahvistettu sähköpostiosoite verkkotunnuksessa polimi.it - Kotisivu
Nimike
Viittaukset
Viittaukset
Vuosi
Design and safety verification of a distributed charge equalizer for modular li-ion batteries
F Baronti, C Bernardeschi, L Cassano, A Domenici, R Roncella, R Saletti
IEEE Transactions on Industrial Informatics 10 (2), 1003-1011, 2014
622014
SRAM-based FPGA systems for safety-critical applications: A survey on design standards and proposed methodologies
C Bernardeschi, L Cassano, A Domenici
Journal of Computer Science and Technology 30, 373-390, 2015
462015
Accurate Simulation of SEUs in the Configuration Memory of SRAM-based FPGAs
C Bernardeschi, L Cassano, A Domenici, L Sterpone
The 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2012
382012
ASSESS: A simulator of soft errors in the configuration memory of SRAM-based FPGAs
C Bernardeschi, L Cassano, A Domenici, L Sterpone
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
282014
GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs
C Bernardeschi, L Cassano, MGCA Cimino, A Domenici
Journal of Systems Architecture 59 (10), 1243-1254, 2013
222013
Failure probability of SRAM-FPGA systems with stochastic activity networks
C Bernardeschi, L Cassano, A Domenici
14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011
222011
A neural network based fault management scheme for reliable image processing
M Biasielli, C Bolchini, L Cassano, E Koyuncu, A Miele
IEEE Transactions on Computers 69 (5), 764-776, 2020
192020
Lifetime-aware load distribution policies in multi-core systems: An in-depth analysis
C Bolchini, L Cassano, A Miele
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 804-809, 2016
192016
A methodology for the design and deployment of distributed cyber–physical systems for smart environments
G Tanganelli, L Cassano, A Miele, C Vallati
Future generation computer systems 109, 420-430, 2020
152020
A microprocessor protection architecture against hardware trojans in memories
A Bolat, L Cassano, P Reviriego, O Ergin, M Ottavi
2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 1-6, 2020
152020
SEU-X: a SEu Un-eXcitability prover for SRAM-FPGAs
C Bernardeschi, L Cassano, A Domenici
The 18th IEEE International On-Line Testing Symposium, 2012
152012
Unexcitability analysis of SEus affecting the routing structure of SRAM-based FPGAs
C Bernardeschi, L Cassano, A Domenici, L Sterpone
Proceedings of the 23rd ACM international conference on Great lakes …, 2013
142013
Fast and accurate error simulation for cnns against soft errors
C Bolchini, L Cassano, A Miele, A Toschi
IEEE Transactions on Computers 72 (4), 984-997, 2022
132022
Failure probability and fault observability of SRAM-FPGA systems
C Bernardeschi, L Cassano, A Domenici
2011 21st International Conference on Field Programmable Logic and …, 2011
112011
AENEAS: An energy-aware simulator of automatic weather stations
D Cesarini, L Cassano, M Kuri, V Bilas, M Avvenuti
IEEE Sensors Journal 14 (11), 3932-3943, 2014
102014
On-line testing of permanent radiation effects in reconfigurable systems
L Cassano, D Cozzi, S Korf, J Hagemeyer, M Porrmann, L Sterpone
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 717-720, 2013
102013
A tool for signal probability analysis of FPGA-based systems
C Bernardeschi, L Cassano, A Domenici, P Masci
Proceedings of the 2nd International Conference on Computational Logics …, 2011
102011
A lightweight security checking module to protect microprocessors against hardware trojan horses
A Palumbo, L Cassano, P Reviriego, G Bianchi, M Ottavi
2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2021
92021
Approximation-based fault tolerance in image processing applications
M Biasielli, C Bolchini, L Cassano, A Mazzeo, A Miele
IEEE Transactions on Emerging Topics in Computing 10 (2), 648-661, 2021
92021
Machine learning-based techniques for incremental functional diagnosis: A comparative analysis
C Bolchini, L Cassano
2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2014
92014
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Artikkelit 1–20