| Impulse: Building a smarter memory controller J Carter, W Hsieh, L Stoller, M Swanson, L Zhang, E Brunvand, A Davis, ... Proceedings Fifth International Symposium on High-Performance Computer …, 1999 | 336 | 1999 |
| Translating concurrent programs into delay-insensitive circuits. E Brunvand, RF Sproull ICCAD, 262-265, 1989 | 177 | 1989 |
| Translating concurrent communicating programs into asynchronous circuits. EL Brunvand | 135 | 1993 |
| The NSR processor E Brunvand [1993] Proceedings of the Twenty-sixth Hawaii International Conference on …, 1993 | 77 | 1993 |
| Using FPGAs to implement self-timed systems E Brunvand Journal of VLSI signal processing systems for signal, image and video …, 1993 | 62 | 1993 |
| Digital VLSI chip design with Cadence and Synopsys CAD tools E Brunvand Addison-Wesley, 2010 | 61 | 2010 |
| Performance analysis and optimization of asynchronous circuits P Kudva, G Gopalakrishnan, E Brunvand, V Akella Proceedings 1994 IEEE International Conference on Computer Design: VLSI in …, 1994 | 58* | 1994 |
| Testing micropipelines A Khoche, E Brunvand Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous …, 1994 | 54 | 1994 |
| Modeling memory concurrency for multi-socket multi-core systems A Mandal, R Fowler, A Porterfield 2010 IEEE International Symposium on Performance Analysis of Systems …, 2010 | 52 | 2010 |
| Fast, effective BVH updates for animated scenes D Kopta, T Ize, J Spjut, E Brunvand, A Davis, A Kensler Proceedings of the ACM SIGGRAPH Symposium on Interactive 3D Graphics and …, 2012 | 49 | 2012 |
| TRaX: A multicore hardware architecture for real-time ray tracing J Spjut, A Kensler, D Kopta, E Brunvand IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 48 | 2009 |
| Estimating performance of a ray-tracing ASIC design S Woop, E Brunvand, P Slusallek 2006 IEEE Symposium on Interactive Ray Tracing, 7-14, 2006 | 47 | 2006 |
| Translating concurrent communicating programs into delay-insensitive circuits E Brunvand, RF Sproull Carnegie Mellon University, Computer Science Department, 1989 | 44 | 1989 |
| A cell set for self-timed design using Actel FPGAs E Brunvand University of Utah, Department of Computer Science, 1991 | 39 | 1991 |
| Fred: An architecture for a self-timed decoupled computer WF Richardson, E Brunvand Proceedings Second International Symposium on Advanced Research in …, 1996 | 38 | 1996 |
| Low latency self-timed flow-through FIFOs E Brunvand Proceedings Sixteenth Conference on Advanced Research in VLSI, 76-90, 1995 | 38 | 1995 |
| A partial scan methodology for testing self-timed circuits A Khoche, E Brunvand Proceedings 13th IEEE VLSI Test Symposium, 283-289, 1995 | 37 | 1995 |
| An energy and bandwidth efficient ray tracing architecture D Kopta, K Shkurko, J Spjut, E Brunvand, A Davis Proceedings of the 5th High-Performance Graphics Conference, 121-128, 2013 | 33 | 2013 |
| High-level asynchronous system design using the ACK framework H Jacobson, E Brunvand, G Gopalakrishnan, P Kudva Proceedings Sixth International Symposium on Advanced Research in …, 2000 | 33 | 2000 |
| Practical advances in asynchronous design and in asynchronous/synchronous interfaces E Brunvand, S Nowick, K Yun Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 104-109, 1999 | 32 | 1999 |
