Hai-Phong Phan
Hai-Phong Phan
University of Sciences, Hue University
Verified email at hueuni.edu.vn
Title
Cited by
Cited by
Year
High-performance adaption of ARM processors into Network-on-Chip architectures
T Nguyen, DH Bui, HP Phan, TT Dang, XT Tran
2013 IEEE International SOC Conference, 222-227, 2013
62013
A fuzzy-logic based voltage-frequency controller for network-on-chip routers
HP Phan, XT Tran
2015 11th Conference on Ph. D. Research in Microelectronics and Electronics…, 2015
42015
Power consumption estimation using VNOC2. 0 simulator for a fuzzy-logic based low power Network-on-Chip
HP Phan, XT Tran, T Yoneda
2017 IEEE International Conference on IC Design and Technology (ICICDT), 1-4, 2017
32017
AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures
XT Tran, T Nguyen, HP Phan, DH Bui
IEICE Transactions on Fundamentals of Electronics, Communications and…, 2017
22017
Fuzzy-logic based low power solution for Network-on-Chip architectures
HP Phan, XT Tran
2016 International Conference on Advanced Technologies for Communications…, 2016
22016
Design and Modeling of a Voltage-Frequency Controller for Network-on-Chip Routers based on Fuzzy-Logic
HP Phan, XT Tran
VNU Journal of Computer Science and Communication Engineering 31 (2), 56-65, 2015
12015
Thiết kế v m hnh ho bộ xử l l-gic mờ trong điều khiển tần số-điện p
HP Phan, XT Tran
2014
High-Level Modeling of a Novel Reconfigurable Network-on-Chip Router
VTV Le, HP Phan, XT Tran
2014
High-Level Modeling of a Novel Reconfigurable Network-on-Chip Router
TV Le Van, HP Phan, XT Tran
2014
System-on-Chip Testbed for Validating the Hardware Design of H. 264/AVC Encoder
HP Phan, KH Nguyen, DH Bui, NK Dang, XT Tran
2013
Open Core Protocol Specification 2.2 Open Core Protocol Specification 2.2, 2008
XT Tran, HP Phan, VH Tran, QV TRAN, NB NGUYEN
電子情報通信学会技術研究報告. VLD, VLSI 設計技術 109 (462), 169-174, 2010
2010
A methodology for the design of AHB bus master wrappers A methodology for the design of AHB bus master wrappers
XT Tran, HP Phan, VH Tran, QV TRAN, NB NGUYEN
電子情報通信学会技術研究報告. VLD, VLSI 設計技術 109 (462), 169-174, 2010
2010
Networks on Chip Networks on Chip, 2003
XT Tran, HP Phan, VH Tran, QV TRAN, NB NGUYEN
電子情報通信学会技術研究報告. VLD, VLSI 設計技術 109 (462), 169-174, 2010
2010
Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA
XT Tran, HP Phan, VH Tran, QV Tran, NB Nguyen
IEICE Technical Report; IEICE Tech. Rep. 109 (462), 169-174, 2010
2010
Design and implementation of an AMBA AHB compliant bus architecture on FPGA (VLSI 設計技術)
XT Tran, HP Phan, VH Tran, T Quang-Vinh, NB Nguyen
電子情報通信学会技術研究報告. VLD, VLSI 設計技術 109 (462), 169-174, 2010
2010
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