Ali Afzali-Kusha
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Substrate noise coupling in SoC design: Modeling, avoidance, and validation
A Afzali-Kusha, M Nagata, NK Verghese, DJ Allstot
Proceedings of the IEEE 94 (12), 2109-2138, 2006
Ground plane fin-shaped field effect transistor (GP-FinFET): A FinFET for low leakage power circuits
M Saremi, A Afzali-Kusha, S Mohammadi
Microelectronic Engineering 95, 74-82, 2012
Evaluation of pseudo adaptive XY routing using an object oriented model for NOC
M Dehyadgari, M Nickray, A Afzali-Kusha, Z Navabi
2005 International Conference on Microelectronics, 5 pp., 2005
EDXY–A low cost congestion-aware routing algorithm for network-on-chips
P Lotfi-Kamran, AM Rahmani, M Daneshtalab, A Afzali-Kusha, Z Navabi
Journal of Systems Architecture 56 (7), 256-264, 2010
Design and analysis of two low-power SRAM cell structures
G Razavipour, A Afzali-Kusha, M Pedram
IEEE transactions on very large scale integration (VLSI) systems 17 (10 …, 2009
Low-power single-and double-edge-triggered flip-flops for high-speed applications
SH Rasouli, A Khademzadeh, A Afzali-Kusha, M Nourani
IEE Proceedings-Circuits, Devices and Systems 152 (2), 118-122, 2005
Dual-quality 4: 2 compressors for utilizing in dynamic accuracy configurable multipliers
O Akbari, M Kamal, A Afzali-Kusha, M Pedram
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2017
RAP-CLA: A reconfigurable approximate carry look-ahead adder
O Akbari, M Kamal, A Afzali-Kusha, M Pedram
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (8), 1089-1093, 2016
RoBA multiplier: A rounding-based approximate multiplier for high-speed yet energy-efficient digital signal processing
R Zendegani, M Kamal, M Bahadori, A Afzali-Kusha, M Pedram
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (2), 393-401, 2016
A novel synthetic traffic pattern for power/performance analysis of network-on-chips using negative exponential distribution
AM Rahmani, A Afzali-Kusha, M Pedram
Journal of Low Power Electronics 5 (3), 396-405, 2009
BZ-FAD: A low-power low-area multiplier based on shift-and-add architecture
M Mottaghi-Dastjerdi, A Afzali-Kusha, M Pedram
IEEE Transactions on very large scale integration (VLSI) systems 17 (2), 302-306, 2009
Data encoding techniques for reducing energy consumption in network-on-chip
N Jafarzadeh, M Palesi, A Khademzadeh, A Afzali-Kusha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (3), 675-685, 2013
Low-distance path-based multicast routing algorithm for network-on-chips
M Daneshtalab, M Ebrahimi, S Mohammadi, A Afzali-Kusha
IET computers & digital techniques 3 (5), 430-442, 2009
NoC hot spot minimization using antnet dynamic routing algorithm
M Daneshtalab, A Sobhani, A Afzali-Kusha, O Fatemi, Z Navabi
IEEE 17th International Conference on Application-specific Systems …, 2006
An energy efficient routing protocol for cluster-based wireless sensor networks using ant colony optimization
AA Salehpour, B Mirmobin, A Afzali-Kusha, S Mohammadi
2008 International Conference on Innovations in Information Technology, 455-459, 2008
Dynamic voltage and frequency scheduling for embedded processors considering power/performance tradeoffs
ME Salehi, M Samadi, M Najibi, A Afzali-Kusha, M Pedram, SM Fakhraie
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (10 …, 2010
A partial-SOI LDMOSFET with triangular buried-oxide for breakdown voltage improvement
M Saremi, B Ebrahimi, A Afzali-Kusha, S Mohammadi
Microelectronics Reliability 51 (12), 2069-2076, 2011
Simultaneous reduction of dynamic and static power in scan structures
S Sharifi, J Jaffari, M Hosseinabady, A Afzali-Kusha, Z Navabi
Design, Automation and Test in Europe, 846-851, 2005
Spiral: A heuristic mapping algorithm for network on chip
A Mehran, S Saeidi, A Khademzadeh, A Afzali-Kusha
IEICE Electronics Express 4 (15), 478-484, 2007
A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies
M Ansari, H Afzali-Kusha, B Ebrahimi, Z Navabi, A Afzali-Kusha, ...
Integration 50, 91-106, 2015
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