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Dr. M. Asha Rani
Dr. M. Asha Rani
Unknown affiliation
Verified email at jntuh.ac.in
Title
Cited by
Cited by
Year
AREA optimized low power arithmetic and logic unit
TE Rani, MA Rani, R Rao
2011 3rd International Conference on Electronics Computer Technology 3, 224-228, 2011
422011
Survey of test strategies for System-on Chip and it's embedded memories
GP Acharya, MA Rani
2013 IEEE Recent Advances in Intelligent Computational Systems (RAICS), 199-204, 2013
132013
Gigabit Ethernet verification using efficient verification methodology
S Chitti, P Chandrasekhar, MA Rani
2015 International Conference on Industrial Instrumentation and Control …, 2015
122015
Design of binary to BCD code converter using area optimized quantum dot cellular automata full adder
B Ramesh, MA Rani
International Journal of Engineering (IJE) 9 (4), 49-64, 2015
122015
Design of an optimal decimal adder in quantum dot cellular automata
B Ramesh, MA Rani
Int. J. Nanotechnol. Appl 11 (2), 197-211, 2017
92017
Berger code based concurrent online self-testing of embedded processors
GP Acharya, MA Rani
Journal of Semiconductors 39 (11), 115001, 2018
82018
Implementation of parallel adders using area efficient quantum dot cellular automata full adder
B Ramesh, MA Rani
2016 10th international conference on intelligent systems and control (ISCO …, 2016
82016
Evaluation of effect of packet injection rate and routing algorithm on network-on-chip performance
M Haghi, M Rani
IJIRSET 3 (2), 9589-9597, 2014
82014
FPGA implementation of memory design and testing
KLVR Kumari, MA Rani, N Balaji
2017 IEEE 7th International Advance Computing Conference (IACC), 552-555, 2017
62017
Design Verification And Test Vector Minimization Using Heuristic Method Of A Ripple Carry Adder
KLVR Kumari, MA Rani, N Balaji
International Journal on Cybernetics & Informatics (IJCI) 5 (4), 307-313, 2016
42016
Optimal energy calculation for cooperative grid networks
BR Devi, MA Rani, KK Rao
NISCAIR-CSIR, India, 2015
42015
Co-operative shortest path relay selection for multihop MANETs
RD Boddu, KK Rao, MA Rani
Proceedings of the 3rd International Conference on Frontiers of Intelligent …, 2015
42015
Bit error probability analysis of cooperative relay selection OFDM systems based on SNR estimation
BR Devi, KK Rao, MA Rani
16th WSEAS international conference on computers (part of the 16th CSCC/CSCC …, 2012
42012
Adaptation of March-SS algorithm to word-oriented memory built-in self-test and repair
GP Acharya, MA Rani, GG Kumar, L Poluboyina
Indonesian Journal of Electrical Engineering and Computer Science 26 (1), 96-104, 2022
32022
Application of modified Bellman-ford algorithm for cooperative communication
BR Devi, KK Rao, MA Rani
Wireless Personal Communications 109 (3), 2025-2049, 2019
32019
FPGA Prototyping of Micro-Blaze soft-processor based Multi-core System on Chip
GP Acharya, MA Rani
International Journal of Engineering & Technology 7 (2.16), 57-60, 2018
32018
Performance analysis of modified Bellman ford algorithm using cooperative relays
R Devi Boddu, KK Rao, MA Rani
Emerging ICT for Bridging the Future-Proceedings of the 49th Annual …, 2015
32015
Power Optimization Analysis of Different Sram Cells Using Transistor Stacking Technique
KLVR Kumari, MA Rani, N Balaji, S Kotha, MM Kota
2021 IEEE 8th Uttar Pradesh Section International Conference on Electrical …, 2021
22021
Self healing memory using 2D spares
VRS Rao, MA Rani
2021 5th International Conference on Computing Methodologies and …, 2021
22021
Evaluation of scheduling algorithms on Linux OS
DR Rinku, M Asha Rani
Advances in Decision Sciences, Image Processing, Security and Computer …, 2020
22020
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