| An architectural framework for runtime optimization MC Merten, AR Trick, RD Barnes, EM Nystrom, CN George, ... IEEE transactions on Computers 50 (6), 567-589, 2001 | 90 | 2001 |
| A hardware mechanism for dynamic extraction and relayout of program hot spots MC Merten, AR Trick, EM Nystrom, RD Barnes, WW Hmu Proceedings of the 27th annual international symposium on Computer …, 2000 | 84 | 2000 |
| Beating in-order stalls with flea-flicker two-pass pipelining RD Barnes, JW Sias, EM Nystrom, SJ Patel, J Navarro, WW Hwu Computers, IEEE Transactions on 55 (1), 18-33, 2006 | 83 | 2006 |
| Beating in-order stalls with flea-flicker two-pass pipelining RD Barnes, EM Nystrom, JW Sias, SJ Patel, N Navarro, WW Hwu Proceedings of the 36th annual IEEE/ACM International Symposium on …, 2003 | 83 | 2003 |
| " Flea-flicker" multipass pipelining: An alternative to the high-power out-of-order offense RD Barnes, S Ryoo, WW Hwu 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005 | 52 | 2005 |
| Vacuum packing: Extracting hardware-detected program phases for post-link optimization RD Barnes, EM Nystrom, MC Merten, WW Hwu 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002 | 49 | 2002 |
| Phase-guided scheduling on single-ISA heterogeneous multicore processors L Sawalha, S Wolff, MP Tull, RD Barnes 2011 14th Euromicro Conference on Digital System Design, 736-745, 2011 | 33 | 2011 |
| Processor architecture for multipass processing of instructions downstream of a stalled instruction WMW Hwu, R Barnes US Patent 8,266,413, 2012 | 27 | 2012 |
| A large 3D swept-volume video display L Sawalha, MP Tull, MB Gately, JJ Sluss, M Yeary, RD Barnes Journal of Display Technology 8 (5), 256-268, 2012 | 20 | 2012 |
| Code reordering and speculation support for dynamic optimization systems EM Nystrom, RD Barnes, MC Merten, WW Hwu Proceedings 2001 International Conference on Parallel Architectures and …, 2001 | 20 | 2001 |
| Energy-Efficient Phase-Aware Scheduling for Heterogeneous Multicore Processors L Sawalha, R Barnes 2012 IEEE Green Technologies Conference, 2012 | 17 | 2012 |
| Feedback-directed data cache optimizations for the x86 R Barnes, R Chaiken, D Gillies 2nd ACM Workshop on Feedback-Directed Optimization (FDO), 1999 | 12 | 1999 |
| Hardware thread‐context switching L Sawalha, MP Tull, RD Barnes Electronics letters 49 (6), 389-391, 2013 | 10 | 2013 |
| Thread scheduling for heterogeneous multicore processors using phase identification L Sawalha, MP Tull, RD Barnes ACM SIGMETRICS Performance Evaluation Review 39 (3), 125-127, 2011 | 10 | 2011 |
| Pathfinder: Oklahoma's advanced traveler information system PA Campbell, JR Junger, JP Havlicek, AR Stevenson, RD Barnes 2011 14th International IEEE Conference on Intelligent Transportation …, 2011 | 8 | 2011 |
| Prediction aggregation of remote traffic microwave sensors speed and volume data JR Junger, JP Havlicek, RD Barnes, MP Tull 2009 12th International IEEE Conference on Intelligent Transportation …, 2009 | 8 | 2009 |
| Exploiting trunked radio to support ITS network expansion and redundancy E Vorakitolan, JP Havlicek, M Atiquzzaman, RD Barnes 2011 IEEE 22nd International Symposium on Personal, Indoor and Mobile Radio …, 2011 | 7 | 2011 |
| Tolerating Cache-Miss Latency with Multipass Pipelines RD Barnes, S Ryoo, WW Hwu Micro, IEEE 26 (1), 40-47, 2006 | 7 | 2006 |
| Realization of ITS applications through mapping technologies: A survey of advanced traveler information systems PA Campbell, JP Havlicek, AR Stevenson, RD Barnes 2012 15th International IEEE Conference on Intelligent Transportation …, 2012 | 6 | 2012 |
| Itanium performance insights from the IMPACT compiler JW Sias, MC Merten, EM Nystrom, RD Barnes, CJ Shannon, ... Hot Chips 13, 2001 | 6 | 2001 |
