| SpaceA: Sparse matrix vector multiplication on processing-in-memory accelerator X Xie, Z Liang, P Gu, A Basak, L Deng, L Liang, X Hu, Y Xie 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 90 | 2021 |
| S2DNAS: Transforming static CNN model for dynamic inference via neural architecture search Z Yuan, B Wu, G Sun, Z Liang, S Zhao, W Bi Computer Vision–ECCV 2020: 16th European Conference, Glasgow, UK, August 23 …, 2020 | 36 | 2020 |
| Hardware-assisted service live migration in resource-limited edge computing systems Z Zhou, X Li, X Wang, Z Liang, G Sun, G Luo 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 9 | 2020 |
| ZUMA: Enabling direct insertion/deletion operations with emerging skyrmion racetrack memory Z Liang, G Sun, W Kang, X Chen, W Zhao Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 8 | 2019 |
| Gain Cell Memory on Logic Platform–Device Guidelines for Oxide Semiconductor Transistor Materials Development S Liu, K Jana, K Toprasertpong, J Chen, Z Liang, Q Jiang, S Wahid, S Qin, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 6 | 2023 |
| Automated design of chiplets A Sangiovanni-Vincentelli, Z Liang, Z Zhou, J Zhang Proceedings of the 2023 International Symposium on Physical Design, 1-8, 2023 | 6 | 2023 |
| {SaFace}: Towards Scenario-aware Face Recognition via Edge Computing System Z Zhou, B Wu, Z Liang, G Sun, C Xu, G Luo 3rd USENIX Workshop on Hot Topics in Edge Computing (HotEdge 20), 2020 | 4 | 2020 |
| Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration S Chen, S Li, Z Zhuang, S Zheng, Z Liang, TY Ho, B Yu, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
| Design Guidelines for Oxide Semiconductor Gain Cell Memory on a Logic Platform S Liu, K Jana, K Toprasertpong, J Chen, Z Liang, Q Jiang, S Wahid, S Qin, ... IEEE Transactions on Electron Devices, 2024 | 1 | 2024 |
