| Parameterized tiled loops for free L Renganarayanan, DG Kim, S Rajopadhye, MM Strout Proceedings of the 28th ACM SIGPLAN Conference on Programming Language …, 2007 | 118 | 2007 |
| Use of snapshots to reduce risk in migration to a standard virtualized environment V Bala, K Bhattacharya, T Diethelm, P Jayachandran, L Renganarayana, ... US Patent 9,092,837, 2015 | 110 | 2015 |
| Encore: Exploiting system environment and correlation information for misconfiguration detection J Zhang, L Renganarayana, X Zhang, N Ge, V Bala, T Xu, Y Zhou Proceedings of the 19th international conference on Architectural support …, 2014 | 105 | 2014 |
| Multi-level tiling: M for the price of one DG Kim, L Renganarayanan, D Rostron, S Rajopadhye, MM Strout Proceedings of the 2007 ACM/IEEE conference on Supercomputing, 1-12, 2007 | 91 | 2007 |
| Programming with Relaxed Synchronization L Renganarayana, V Srinivasan, R Nair, D Prener RACES Workshop, 2012 | 80 | 2012 |
| A model for fusion and code motion in an automatic parallelizing compiler U Bondhugula, S Dash, O Gunluk, L Renganarayanan 2010 19th International Conference on Parallel Architectures and Compilation …, 2010 | 71 | 2010 |
| Conformance specification and checking for hosting services YW Huang, P Jin, FJ Meng, M Montinarelli, B Peterson, L Renganarayana, ... US Patent App. 14/214,819, 2015 | 63 | 2015 |
| Automatic creation of tile size selection models T Yuki, L Renganarayanan, S Rajopadhye, C Anderson, AE Eichenberger, ... Proceedings of the 8th annual IEEE/ACM international symposium on Code …, 2010 | 63 | 2010 |
| Adjustment to managed-infrastructure-as-a-service cloud standard R Ananthanarayanan, K Bhattacharya, F Graf, P Jayachandran, ... US Patent 9,742,873, 2017 | 51 | 2017 |
| Towards optimal multi-level tiling for stencil computations L Renganarayana, M Harthikote-Matha, R Dewri, S Rajopadhye 2007 IEEE International Parallel and Distributed Processing Symposium, 1-10, 2007 | 50 | 2007 |
| Parameterized loop tiling L Renganarayanan, D Kim, MM Strout, S Rajopadhye ACM Transactions on Programming Languages and Systems (TOPLAS) 34 (1), 1-41, 2012 | 45 | 2012 |
| A geometric programming framework for optimal multi-level tiling L Renganarayana, S Rajopadhye SC'04: Proceedings of the 2004 ACM/IEEE conference on Supercomputing, 18-18, 2004 | 42 | 2004 |
| DNA Polymerases and mutants thereof J Lee, G Gerard, H Shandilya, K Griffiths, M Gibbs, P Bergquist, R Potter US Patent App. 10/244,081, 2007 | 41 | 2007 |
| System and method for determining when cloud virtual machines need to be updated MD DE ASSUNCAO, MAS Netto, L Renganarayana, CC Young US Patent 9,298,443, 2016 | 38 | 2016 |
| Cloudaffinity: A framework for matching servers to cloudmates MD Assuncao, MAS Netto, B Peterson, L Renganarayana, J Rofrano, ... 2012 IEEE Network Operations and Management Symposium, 213-220, 2012 | 33 | 2012 |
| Switch memory architectures S Rajopadhye, L Renganarayana, G Gupta US Patent 7,412,586, 2008 | 30 | 2008 |
| Positivity, posynomials and tile size selection L Renganarayana, S Rajopadhye SC'08: Proceedings of the 2008 ACM/IEEE Conference on Supercomputing, 1-12, 2008 | 29 | 2008 |
| What to discover before migrating to the cloud K Bai, N Ge, H Jamjoom, EE Jan, L Renganarayana, X Zhang 2013 IFIP/IEEE International Symposium on Integrated Network Management (IM …, 2013 | 24 | 2013 |
| Tracking and detecting thread dependencies using speculative versioning cache AE Eichenberger, JKP O'brien, KM O'brien, L Renganarayana, X Zhuang US Patent 8,468,539, 2013 | 22 | 2013 |
| System, method and program product for cost-aware selection of stored virtual machine images for subsequent use MD De Assuncao, MAS Netto, L Renganarayana, CC Young US Patent 8,930,957, 2015 | 19 | 2015 |
Sanjay RajopadhyeColorado State UniversityVerified email at colostate.edu
