The bistable ring PUF: A new architecture for strong physical unclonable functions Q Chen, G Csaba, P Lugli, U Schlichtmann, U Rührmair 2011 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2011 | 270 | 2011 |
Characterization of the bistable ring PUF Q Chen, G Csaba, P Lugli, U Schlichtmann, U Rührmair 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 51 | 2012 |
Towards Electrical, Integrated Implementations of SIMPL Systems U Rührmair, Q Chen, M Stutzmann, P Lugli, U Schlichtmann, G Csaba Cryptology ePrint Archive, 2009 | 41 | 2009 |
Application of mismatched cellular nonlinear networks for physical cryptography G Csaba, X Ju, Z Ma, Q Chen, W Porod, J Schmidhuber, U Schlichtmann, ... 2010 12th International Workshop on Cellular Nanoscale Networks and their …, 2010 | 40 | 2010 |
Analog circuits for physical cryptography Q Chen, G Csaba, X Ju, SB Natarajan, P Lugli, M Stutzmann, ... Proceedings of the 2009 12th International symposium on integrated circuits …, 2009 | 28 | 2009 |
Circuit-based approaches to SIMPL systems Q Chen, G Csaba, P Lugli, U Schlichtmann, M Stutzmann, U Ruehrmair Journal of Circuits, Systems, and Computers 20 (01), 107-123, 2011 | 18 | 2011 |
On-chip electric waves: An analog circuit approach to physical uncloneable functions G Csaba, X Ju, Q Chen, W Porod, J Schmidhuber, U Schlichtmann, ... Cryptology ePrint Archive, 2009 | 18 | 2009 |
Emulation of an ASIC power and temperature monitoring system (eTPMon) for FPGA prototyping E Glocker, Q Chen, U Schlichtmann, D Schmitt-Landsiedel Microprocessors and Microsystems 50, 90-101, 2017 | 10 | 2017 |
Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays É Sousa, F Hannig, J Teich, Q Chen, U Schlichtmann Proceedings of the 18th International Workshop on Software and Compilers for …, 2015 | 8 | 2015 |
Dark silicon management: an integrated and coordinated cross-layer approach S Pagani, L Bauer, Q Chen, E Glocker, F Hannig, A Herkersdorf, H Khdr, ... it-Information Technology 58 (6), 297-307, 2016 | 5 | 2016 |
Emulation of an ASIC Power and Temperature Monitor System for FPGA Prototyping E Glocker, Q Chen, A Zaidi, U Schlichtmann, D Schmitt-Landsiedel 10th International Symposium on Reconfigurable Communication-centric Systems …, 2015 | 5 | 2015 |
MWA Skew SRAM Based SIMPL Systems for Public-Key Physical Cryptography Q Chen, U Rührmair, S Narayana, U Sharif, U Schlichtmann 8th International Conference on Trust & Trustworthy Computing (TRUST 2015), 2015 | 2 | 2015 |
Temperature modeling and emulation of an ASIC temperature monitor system for Tightly-Coupled Processor Arrays (TCPAs) E Glocker, S Boppu, Q Chen, U Schlichtmann, J Teich, ... Advances in Radio Science 12, 103-109, 2014 | 1 | 2014 |
Emulated ASIC Power and Temperature Monitor System for FPGA Prototyping of an Invasive MPSoC Computing Architecture E Glocker, Q Chen, AM Zaidi, U Schlichtmann, D Schmitt-Landsiedel arXiv preprint arXiv:1405.2909, 2014 | 1 | 2014 |
Emulierung eines ASIC-Leistungsverbrauchs- und Temperaturmonitorsystems für FPGA-Prototyping eines ressourcengewahren Computersystems E Glocker, Q Chen, A Zaidi, U Schlichtmann, D Schmitt-Landsiedel 16. Workshop Analogschaltungen, 2014 | | 2014 |