Loading...
The system can't perform the operation now. Try again later.
Citations per year
Duplicate citations
The following articles are merged in Scholar. Their
combined citations
are counted only for the first article.
Merged citations
This "Cited by" count includes citations to the following articles in Scholar. The ones marked
*
may be different from the article in the profile.
Add co-authors
Co-authors
Follow
New articles by this author
New citations to this author
New articles related to this author's research
Email address for updates
Done
My profile
My library
Metrics
Alerts
Settings
Sign in
Sign in
Get my own profile
Follow
Jyoti Rugi
Asst.Prof ECE of
CMRIT
Verified email at cmrit.ac.in
VLSI
Microprocessor
Computer Networks
network Security
Title
Sort
Sort by citations
Sort by year
Sort by title
Cited by
Cited by
Year
LOW POWER VLSI IMPLEMENTATION OF PSEUDO RANDOM SEQUENCE GENERATOR
BN Jyoti M Roogi,Chetan H
GE-International Journal of Engineering Research 4 (Issue 7), 5
, 2016
2016
The system can't perform the operation now. Try again later.
Show more
Privacy
Terms
Help
About Scholar
Search help