Seuraa
Donghyuk Lee
Donghyuk Lee
NVIDIA
Vahvistettu sähköpostiosoite verkkotunnuksessa nvidia.com - Kotisivu
Nimike
Viittaukset
Viittaukset
Vuosi
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors
Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu
ACM SIGARCH Computer Architecture News 42 (3), 361-372, 2014
12762014
Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology
V Seshadri, D Lee, T Mullins, H Hassan, A Boroumand, J Kim, MA Kozuch, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
5042017
RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization
V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
4492013
A case for exploiting subarray-level parallelism (SALP) in DRAM
Y Kim, V Seshadri, D Lee, J Liu, O Mutlu
ACM SIGARCH Computer Architecture News 40 (3), 368-379, 2012
4302012
A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 128 I/Os Using TSV Based Stacking
JS Kim, CS Oh, H Lee, D Lee, HR Hwang, S Hwang, B Na, J Moon, ...
IEEE Journal of Solid-State Circuits 47 (1), 107-116, 2011
3752011
Tiered-latency DRAM: A low latency and low cost DRAM architecture
D Lee, Y Kim, V Seshadri, J Liu, L Subramanian, O Mutlu
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
3292013
Improving DRAM performance by parallelizing refreshes with accesses
KKW Chang, D Lee, Z Chishti, AR Alameldeen, C Wilkerson, Y Kim, ...
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
2422014
Adaptive-latency DRAM: Optimizing DRAM timing for the common-case
D Lee, Y Kim, G Pekhimenko, S Khan, V Seshadri, K Chang, O Mutlu
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
2392015
Fast bulk bitwise AND and OR in DRAM
V Seshadri, K Hsieh, A Boroum, D Lee, MA Kozuch, O Mutlu, PB Gibbons, ...
IEEE Computer Architecture Letters 14 (2), 127-131, 2015
2202015
Low-cost inter-linked subarrays (LISA): Enabling fast inter-subarray data movement in DRAM
KK Chang, PJ Nair, D Lee, S Ghose, MK Qureshi, O Mutlu
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
2182016
The efficacy of error mitigation techniques for DRAM retention failures: A comparative experimental study
S Khan, D Lee, Y Kim, AR Alameldeen, C Wilkerson, O Mutlu
ACM SIGMETRICS Performance Evaluation Review 42 (1), 519-532, 2014
2132014
Understanding latency variation in modern DRAM chips: Experimental characterization, analysis, and optimization
KK Chang, A Kashyap, H Hassan, S Ghose, K Hsieh, D Lee, T Li, ...
Proceedings of the 2016 ACM SIGMETRICS International Conference on …, 2016
2112016
Understanding reduced-voltage operation in modern DRAM devices: Experimental characterization, analysis, and mechanisms
KK Chang, AG Yağlıkçı, S Ghose, A Agrawal, N Chatterjee, A Kashyap, ...
Proceedings of the ACM on Measurement and Analysis of Computing Systems 1 (1 …, 2017
2002017
GRIM-Filter: Fast seed location filtering in DNA read mapping using processing-in-memory technologies
JS Kim, D Senol Cali, H Xin, D Lee, S Ghose, M Alser, H Hassan, O Ergin, ...
BMC genomics 19 (2), 23-40, 2018
1692018
Fine-grained DRAM: Energy-efficient DRAM for extreme bandwidth systems
M O'Connor, N Chatterjee, D Lee, J Wilson, A Agrawal, SW Keckler, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
1692017
Simultaneous multi-layer access: Improving 3D-stacked memory bandwidth at low cost
D Lee, S Ghose, G Pekhimenko, S Khan, O Mutlu
ACM Transactions on Architecture and Code Optimization (TACO) 12 (4), 1-29, 2016
1692016
ChargeCache: Reducing DRAM latency by exploiting row access locality
H Hassan, G Pekhimenko, N Vijaykumar, V Seshadri, D Lee, O Ergin, ...
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
1662016
Accelerating read mapping with FastHASH
H Xin, D Lee, F Hormozdiari, S Yedkar, O Mutlu, C Alkan
BMC genomics 14, 1-13, 2013
1522013
Decoupled direct memory access: Isolating CPU and IO traffic by leveraging a dual-data-port DRAM
D Lee, L Subramanian, R Ausavarungnirun, J Choi, O Mutlu
2015 International Conference on Parallel Architecture and Compilation (PACT …, 2015
1372015
PARBOR: An efficient system-level technique to detect data-dependent failures in DRAM
S Khan, D Lee, O Mutlu
2016 46th Annual IEEE/IFIP International Conference on Dependable Systems …, 2016
1362016
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