| A scalable high throughput firewall in FPGA GS Jedhe, A Ramamoorthy, K Varghese 2008 16th International Symposium on Field-Programmable Custom Computing …, 2008 | 92 | 2008 |
| Runtime programmable and memory bandwidth optimized FPGA-based coprocessor for deep convolutional neural network N Shah, P Chaudhari, K Varghese IEEE Transactions on Neural Networks and Learning Systems 29 (12), 5922-5934, 2018 | 58 | 2018 |
| Dynamically reconfigurable regular expression matching architecture J Divyasree, H Rajashekar, K Varghese 2008 International Conference on Application-Specific Systems, Architectures …, 2008 | 40 | 2008 |
| Hybrid working set algorithm for SVM learning with a kernel coprocessor on FPGA S Venkateshan, A Patel, K Varghese IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (10 …, 2014 | 27 | 2014 |
| A risc-v isa compatible processor ip for soc S Budi, P Gupta, K Varghese, A Bharadwaj 2018 International Symposium on Devices, Circuits and Systems (ISDCS), 1-5, 2018 | 11 | 2018 |
| A soft RISC-V vector processor for edge-AI VN Chander, K Varghese 2022 35th International Conference on VLSI Design and 2022 21st …, 2022 | 10 | 2022 |
| A risc-v isa compatible processor ip A Birari, P Birla, K Varghese, A Bharadwaj 2020 24th International Symposium on VLSI Design and Test (VDAT), 1-6, 2020 | 8 | 2020 |
| FPGA based reconfigurable coprocessor for deep convolutional neural network training SR Clere, S Sethumadhavan, K Varghese 2018 21st Euromicro conference on digital system design (DSD), 381-388, 2018 | 6 | 2018 |
| Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA T Gokulan, A Muraleedharan, K Varghese 2020 23rd Euromicro Conference on Digital System Design (DSD), 340-343, 2020 | 5 | 2020 |
| Accelerating method of moments based package‐board 3D parasitic extraction using FPGA A Devi, M Gandhi, K Varghese, D Gope Microwave and Optical Technology Letters 58 (4), 776-783, 2016 | 5 | 2016 |
| Transparent FPGA based device for SQL DDoS mitigation K Pandiyarajan, S Haridas, K Varghese 2013 International Conference on Field-Programmable Technology (FPT), 82-89, 2013 | 5 | 2013 |
| Hardware accelerator for 3D method of moments based parasitic extraction A Devi, M Gandhi, K Varghese, D Gope 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium (EDAPS …, 2013 | 4 | 2013 |
| In-channel flow control scheme for network-on-chip VV Nimbalkar, K Varghese 2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010 | 4 | 2010 |
| A high-throughput clock-less architecture for soft-output Viterbi detection A Dey, S Jose, K Varghese, SG Srinivasa 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | 3 | 2017 |
| A scalable network port scan detection system on FPGA T Anand, Y Waghela, K Varghese 2011 International Conference on Field-Programmable Technology, 1-6, 2011 | 3 | 2011 |
| Design of a Multi-Core Compatible Linux Bootable 64-bit Out-of-Order RISC-V Processor Core S Sajin, SS Garag, A Phegade, D Gusain, K Varghese 2023 36th International Conference on VLSI Design and 2023 22nd …, 2023 | 2 | 2023 |
| High Throughput Hardware for Hoeffding Tree Algorithm with Adaptive Naive Bayes Predictor A Antony, A Devi, K Varghese 2021 6th International Conference for Convergence in Technology (I2CT), 1-6, 2021 | 2 | 2021 |
| HD resolution intra prediction architecture for H. 264 decoder J Shah, KS Raghunandan, K Varghese 2012 25th International Conference on VLSI Design, 107-112, 2012 | 2 | 2012 |
| Hardware Accelerator for Support Vector Machine Training A Patel, V Sriram, K Varghese Training 1, 2, 0 | 2 | |
| A high throughput non-uniformly quantized binary SOVA detector on FPGA S Datta, K Varghese, SG Srinivasa 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 1 | 2016 |
