Xinmiao Zhang
Xinmiao Zhang
The Ohio State University
Verified email at case.edu
Title
Cited by
Cited by
Year
High-speed VLSI architectures for the AES algorithm
X Zhang, KK Parhi
IEEE transactions on very large scale integration (VLSI) systems 12 (9), 957-967, 2004
5102004
Implementation approaches for the advanced encryption standard algorithm
X Zhang, KK Parhi
IEEE Circuits and systems Magazine 2 (4), 24-46, 2002
1782002
Wireless security and cryptography: specifications and implementations
N Sklavos, X Zhang
CRC Press, 2017
1432017
Error correction for multi-level NAND flash memory using Reed-Solomon codes
B Chen, X Zhang, Z Wang
2008 IEEE Workshop on Signal Processing Systems, 94-99, 2008
1252008
On the optimum constructions of composite field for the AES algorithm
X Zhang, KK Parhi
IEEE Transactions on circuits and systems II: express briefs 53 (10), 1153-1157, 2006
1222006
Reduced-complexity decoder architecture for non-binary LDPC codes
X Zhang, F Cai
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (7 …, 2010
1052010
High-speed architectures for parallel long BCH encoders
X Zhang, KK Parhi
IEEE Transactions on very large scale integration (VLSI) Systems 13 (7), 872-877, 2005
922005
Efficient partial-parallel decoder architecture for quasi-cyclic nonbinary LDPC codes
X Zhang, F Cai
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (2), 402-414, 2010
662010
Reliability-driven ECC allocation for multiple bit error resilience in processor cache
S Paul, F Cai, X Zhang, S Bhunia
IEEE Transactions on Computers 60 (1), 20-34, 2010
592010
Backward interpolation architecture for algebraic soft-decision Reed–Solomon decoding
J Zhu, X Zhang, Z Wang
IEEE transactions on very large scale integration (VLSI) systems 17 (11 …, 2009
532009
Low-complexity reliability-based message-passing decoder architectures for non-binary LDPC codes
X Zhang, F Cai, S Lin
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (11 …, 2011
522011
Relaxed min-max decoder architectures for nonbinary low-density parity-check codes
F Cai, X Zhang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (11 …, 2012
472012
Reduced-complexity column-layered decoding and implementation for LDPC codes
Z Cui, Z Wang, X Zhang
IET communications 5 (15), 2177-2186, 2011
442011
Fast factorization architecture in soft-decision Reed-Solomon decoding
X Zhang, KK Parhi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (4), 413-426, 2005
402005
Factorization-free low-complexity Chase soft-decision decoding of Reed-Solomon codes
J Zhu, X Zhang
2009 IEEE International Symposium on Circuits and Systems, 2677-2680, 2009
362009
VLSI architectures for modern error-correcting codes
X Zhang
Crc Press, 2017
312017
Algebraic soft-decision decoder architectures for long Reed–Solomon codes
X Zhang, J Zhu
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (10), 787-792, 2010
292010
Partial-parallel decoder architecture for quasi-cyclic non-binary LDPC codes
X Zhang, F Cai
2010 IEEE International Conference on Acoustics, Speech and Signal …, 2010
282010
Reduced complexity interpolation architecture for soft-decision Reed–Solomon decoding
X Zhang
IEEE transactions on very large scale integration (VLSI) systems 14 (10 …, 2006
282006
A low-complexity three-error-correcting BCH decoder for optical transport network
X Zhang, Z Wang
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (10), 663-667, 2012
242012
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