| Flexible decoupled transactional memory support A Shriraman, S Dwarkadas, ML Scott 2008 International Symposium on Computer Architecture, 139-150, 2008 | 206 | 2008 |
| Cache coherence for GPU architectures I Singh, A Shriraman, WWL Fung, M O'Connor, TM Aamodt 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 163 | 2013 |
| An integrated hardware-software approach to flexible transactional memory A Shriraman, MF Spear, H Hossain, VJ Marathe, S Dwarkadas, ML Scott ACM SIGARCH Computer Architecture News 35 (2), 104-115, 2007 | 156 | 2007 |
| Mechanism to support flexible decoupled transactional memory S Dwarkadas, A Shriraman, M Scott US Patent 8,661,204, 2014 | 123 | 2014 |
| Power containers: An OS facility for fine-grained power and energy management on multicore servers K Shen, A Shriraman, S Dwarkadas, X Zhang, Z Chen ACM SIGARCH Computer Architecture News 41 (1), 65-76, 2013 | 117 | 2013 |
| SPACE: Sharing pattern-based directory coherence for multicore scalability H Zhao, A Shriraman, S Dwarkadas 2010 19th International Conference on Parallel Architectures and Compilation …, 2010 | 96 | 2010 |
| Hardware acceleration of software transactional memory A Shriraman, VJ Marathe, S Dwarkadas, ML Scott, D Eisenstat, C Heriot, ... ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, 2006 | 84 | 2006 |
| Amoeba-cache: Adaptive blocks for eliminating waste in the memory hierarchy S Kumar, H Zhao, A Shriraman, E Matthews, S Dwarkadas, L Shannon 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 376-388, 2012 | 74 | 2012 |
| SPATL: Honey, I shrunk the coherence directory H Zhao, A Shriraman, S Dwarkadas, V Srinivasan 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 67 | 2011 |
| Refereeing conflicts in hardware transactional memory A Shriraman, S Dwarkadas Proceedings of the 23rd international conference on Supercomputing, 136-146, 2009 | 67 | 2009 |
| System and method for hardware acceleration of a software transactional memory M Scott, S Dwarkadas, A Shriraman, V Marathe, MF Spear US Patent 8,180,971, 2012 | 51 | 2012 |
| Protozoa: Adaptive granularity cache coherence H Zhao, A Shriraman, S Kumar, S Dwarkadas ACM SIGARCH Computer Architecture News 41 (3), 547-558, 2013 | 42 | 2013 |
| Parabix: Boosting the efficiency of text processing on commodity processors D Lin, N Medforth, KS Herdy, A Shriraman, R Cameron IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012 | 35 | 2012 |
| Fusion: Design tradeoffs in coherent cache hierarchies for accelerators S Kumar, A Shriraman, N Vedula Proceedings of the 42Nd Annual International Symposium on Computer …, 2015 | 34 | 2015 |
| SQRL: hardware accelerator for collecting software data structures S Kumar, A Shriraman, V Srinivasan, D Lin, J Phillips Proceedings of the 23rd international conference on Parallel architectures …, 2014 | 33* | 2014 |
| Transactional mutex locks MF Spear, A Shriraman, L Dalessandro, ML Scott SIGPLAN Workshop on Transactional Computing, 2009 | 30 | 2009 |
| Memory in processor: A novel design paradigm for supercomputing architectures N Venkateswaran, WR Foundation, A Krishnan, SN Kumar, A Shriraman, ... ACM SIGARCH Computer Architecture News 32 (3), 19-26, 2003 | 26 | 2003 |
| Alert-on-update: a communication aid for shared memory multiprocessors MF Spear, A Shriraman, H Hossain, S Dwarkadas, ML Scott Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of …, 2007 | 25 | 2007 |
| Bitwise data parallelism in regular expression matching RD Cameron, TC Shermer, A Shriraman, KS Herdy, D Lin, BR Hull, M Lin 2014 23rd International Conference on Parallel Architecture and Compilation …, 2014 | 22 | 2014 |
| Nonblocking transactions without indirection using alert-on-update MF Spear, A Shriraman, L Dalessandro, S Dwarkadas, ML Scott Proceedings of the nineteenth annual ACM symposium on Parallel algorithms …, 2007 | 21 | 2007 |
Sandhya DwarkadasUniversity of RochesterVerified email at cs.rochester.edu
