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Saroj Satapathy
Saroj Satapathy
Intel
Verified email at umn.edu
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Cited by
Cited by
Year
Estimating delay differences of arbiter PUFs using silicon data
SVS Avvaru, C Zhou, S Satapathy, Y Lao, CH Kim, KK Parhi
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 543-546, 2016
262016
Soft response generation and thresholding strategies for linear and feed-forward MUX PUFs
C Zhou, S Satapathy, Y Lao, KK Parhi, CH Kim
Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016
242016
A test circuit based on a ring oscillator array for statistical characterization of Plasma-Induced Damage
WH Choi, S Satapathy, J Keane, CH Kim
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-4, 2014
162014
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients
S Satapathy, WH Choi, X Wang, CH Kim
2015 IEEE International Reliability Physics Symposium, 6A. 3.1-6A. 3.5, 2015
122015
Digital Circuit Design Using CMOS Transistor Model for Development in ASIC/SOC Technology
SK Satapathy
2007 International Symposium on Signals, Circuits and Systems 1, 1-4, 2007
42007
Estimating delay differences of arbiter PUFs using silicon data. In 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)
SS Avvaru, C Zhou, S Satapathy, Y Lao, CH Kim, KK Parhi
IEEE, 2016
32016
Aging Effects On Clock Gated Memory Phase Paths
A Ghosh, S Satapathy, JP Kulkarni, PD Joshi
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022
2022
Static EMIR Analysis for Multi Power Domain SoC Using Voltage Storm and Encounter Power System (EPS)
S Satapathy, G Tadi
Cadence Live international conference – CDNLive, 2010
2010
Reducing Library Design Effort with Cadabra Layout Automation
S Satapathy, P Satyanarayana, V Kanchi
Synopsys User Group Conference, 2008
2008
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