Behnam Ghavami
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An image encryption method based on chaos system and AES algorithm
A Arab, MJ Rostami, B Ghavami
The Journal of Supercomputing 75 (10), 6663-6682, 2019
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors
M Kishani, HR Zarandi, H Pedram, A Tajary, M Raji, B Ghavami
Design Automation for Embedded Systems 15 (3), 289-310, 2011
An EDA tool for implementation of low power and secure crypto-chips
B Ghavami, H Pedram, M Najibi
Computers & Electrical Engineering 35 (2), 244-257, 2009
High performance asynchronous design flow using a novel static performance analysis method
B Ghavami, H Pedram
Computers & Electrical Engineering 35 (6), 920-941, 2009
Soft error rate estimation of combinational circuits based on vulnerability analysis
M Raji, H Pedram, B Ghavami
IET Computers & Digital Techniques 9 (6), 311-320, 2015
Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in the Presence of Process Variations
M Raji, B Ghavami
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
Statistical functional yield estimation and enhancement of CNFET-based VLSI circuits
B Ghavami, M Raji, H Pedram, M Pedram
IEEE transactions on very large scale integration (VLSI) systems 21 (5), 887-900, 2012
Design of dual threshold voltages asynchronous circuits
B Ghavami, H Pedram
Proceeding of the 13th international symposium on Low power electronics and …, 2008
A CNFET full adder cell design for high-speed arithmetic units
MM GHANAGHESTANI, B Ghavami, H Salehpour
Turkish Journal of Electrical Engineering & Computer Sciences 25 (3), 2399-2409, 2017
Gate resizing for soft error rate reduction in nano-scale digital circuits considering process variations
M Raji, B Ghavami, H Pedram
2015 Euromicro Conference on Digital System Design, 445-452, 2015
Defect and variation issues on design mapping of reconfigurable nanoscale crossbars
B Ghavami, A Tajary, M Raji, H Pedram
2010 IEEE Computer Society Annual Symposium on VLSI, 173-178, 2010
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
A Mehdizadeh, B Ghavami, MS Zamani, H Pedram, F Mehdipour
2007 IFIP International Conference on Very Large Scale Integration, 151-156, 2007
A scalable solution to soft error tolerant circuit design using partitioning-based gate sizing
MA Sabet, B Ghavami, M Raji
IEEE Transactions on Reliability 66 (1), 245-256, 2017
A practical metric for soft error vulnerability analysis of combinational circuits
M Raji, H Pedram, B Ghavami
Microelectronics Reliability 55 (2), 448-460, 2015
Dual-threshold voltage technique for asynchronous pre-charge full buffer linear-pipelines
B Ghavami, H Pedram
2007 6th IEEE Dallas Circuits and Systems Workshop on System-on-Chip, 1-4, 2007
A survey on fault injection methods of digital integrated circuits
M Eslami, B Ghavami, M Raji, A Mahani
Integration 71, 154-163, 2020
SCAR-FPGA: A novel side-channel attack resistant FPGA
A Mokari, B Ghavami, H Pedram
2009 5th Southern Conference on Programmable Logic (SPL), 177-182, 2009
Statistical static performance analysis of asynchronous circuits considering process variation
M Raji, B Ghavami, H Pedram
2009 10th International Symposium on Quality Electronic Design, 291-296, 2009
Failure Characterization of Carbon Nanotube FETs under Process Variations: Technology Scaling Issues
B Ghavami, M Raji
IEEE Transactions on Device and Materials Reliability, 2016
An information gain approach to infer gene regulatory networks
M Jafari, B Ghavami, VS Naeini
2015 22nd Iranian Conference on Biomedical Engineering (ICBME), 81-86, 2015
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