Tulika Mitra
Tulika Mitra
Professor of Computer Science, National University of Singapore
Vahvistettu sähköpostiosoite verkkotunnuksessa - Kotisivu
The worst-case execution-time problem—overview of methods and survey of tools
R Wilhelm, J Engblom, A Ermedahl, N Holsti, S Thesing, D Whalley, ...
ACM Transactions on Embedded Computing Systems (TECS) 7 (3), 1-53, 2008
Chronos: A timing analyzer for embedded software
X Li, Y Liang, T Mitra, A Roychoudhury
Science of Computer Programming 69 (1-3), 56-67, 2007
Timing analysis of concurrent programs running on shared cache multi-cores
Y Liang, H Ding, T Mitra, A Roychoudhury, Y Li, V Suhendra
Real-Time Systems 48, 638-680, 2012
Hierarchical power management for asymmetric multi-core in dark silicon era
TS Muthukaruppan, M Pricopi, V Venkataramani, T Mitra, S Vishin
Proceedings of the 50th Annual Design Automation Conference, 1-9, 2013
Scalable custom instructions identification for instruction-set extensible processors
P Yu, T Mitra
Proceedings of the 2004 international conference on Compilers, architecture …, 2004
WCET centric data allocation to scratchpad memory
V Suhendra, T Mitra, A Roychoudhury, T Chen
26th IEEE International Real-Time Systems Symposium (RTSS'05), 10 pp.-232, 2005
Exploring locking & partitioning for predictable shared caches on multi-cores
V Suhendra, T Mitra
Proceedings of the 45th annual Design Automation Conference, 300-303, 2008
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
V Suhendra, C Raghavan, T Mitra
Proceedings of the 2006 international conference on Compilers, architecture …, 2006
HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect
M Karunaratne, AK Mohite, T Mitra, LS Peh
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
Estimating the worst-case energy consumption of embedded software
R Jayaseelan, T Mitra, X Li
12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2006
Accurate estimation of cache-related preemption delay
HS Negi, T Mitra, A Roychoudhury
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
Power-performance modeling on asymmetric multi-cores
M Pricopi, TS Muthukaruppan, V Venkataramani, T Mitra, S Vishin
2013 International Conference on Compilers, Architecture and Synthesis for …, 2013
Integrated CPU-GPU power management for 3D mobile games
A Pathania, Q Jiao, A Prakash, T Mitra
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
Improving superscalar instruction dispatch and issue by exploiting dynamic code sequences
S Vajapeyam, T Mitra
ACM SIGARCH Computer Architecture News 25 (2), 1-12, 1997
Lin-analyzer: A high-level performance analysis tool for FPGA-based accelerators
G Zhong, A Prakash, Y Liang, T Mitra, S Niar
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
Modeling shared cache and bus in multi-cores for timing analysis
S Chattopadhyay, A Roychoudhury, T Mitra
Proceedings of the 13th international workshop on software & compilers for …, 2010
Modeling out-of-order processors for WCET analysis
X Li, A Roychoudhury, T Mitra
Real-Time Systems 34 (3), 195-227, 2006
Temperature aware task sequencing and voltage scaling
R Jayaseelan, T Mitra
2008 IEEE/ACM International Conference on Computer-Aided Design, 618-623, 2008
Characterizing embedded applications for instruction-set extensible processors
P Yu, T Mitra
Proceedings of the 41st annual Design Automation Conference, 723-728, 2004
High-throughput cnn inference on embedded arm big. little multicore processors
S Wang, G Ananthanarayanan, Y Zeng, N Goel, A Pathania, T Mitra
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
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Artikkelit 1–20