| Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration AK Ramanathan, GS Kalsi, S Srinivasa, TM Chandran, KR Pillai, OJ Omer, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 42 | 2020 |
| ROBIN: Monolithic-3D SRAM for enhanced robustness with in-memory computation support S Srinivasa, AK Ramanathan, X Li, WH Chen, SK Gupta, MF Chang, ... IEEE Transactions on Circuits and Systems I: Regular Papers 66 (7), 2533-2545, 2019 | 30 | 2019 |
| A monolithic-3D SRAM design with enhanced robustness and in-memory computation support S Srinivasa, AK Ramanathan, X Li, WH Chen, FK Hsueh, CC Yang, ... Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 25 | 2018 |
| CAPE: A content-addressable processing engine H Caminal, K Yang, S Srinivasa, AK Ramanathan, K Al-Hawaj, T Wu, ... 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 19 | 2021 |
| Monolithic 3D+-IC based massively parallel compute-in-memory macro for accelerating database and machine learning primitives AK Ramanathan, SS Rangachar, JM Hung, CY Lee, CX Xue, SP Huang, ... 2020 IEEE International Electron Devices Meeting (IEDM), 28.5. 1-28.5. 4, 2020 | 14 | 2020 |
| Monolithic 3D+ -IC based Reconfigurable Compute-in-Memory SRAM Macro S Srinivasa, YN Tu, X Si, CX Xue, CY Lee, FK Hsueh, CH Shen, JM Shieh, ... 2019 Symposium on VLSI Technology, T32-T33, 2019 | 13 | 2019 |
| FARM: A flexible accelerator for recurrent and memory augmented neural networks N Challapalle, S Rampalli, N Jao, A Ramanathan, J Sampson, ... Journal of Signal Processing Systems 92, 1247-1261, 2020 | 12 | 2020 |
| IMC-sort: In-memory parallel sorting architecture using hybrid memory cube Z Li, N Challapalle, AK Ramanathan, V Narayanan Proceedings of the 2020 on Great Lakes Symposium on VLSI, 45-50, 2020 | 10 | 2020 |
| Harnessing emerging technology for compute-in-memory support N Jao, AK Ramanathan, S Srinivasa, S George, J Sampson, V Narayanan 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 447-452, 2018 | 9 | 2018 |
| Integrated CAM-RAM functionality using ferroelectric FETs S George, N Jao, AK Ramanathan, X Li, SK Gupta, J Sampson, ... 2020 21st International Symposium on Quality Electronic Design (ISQED), 81-86, 2020 | 7 | 2020 |
| Programmable non-volatile memory design featuring reconfigurable in-memory operations N Jao, AK Ramanathan, A Sengupta, J Sampson, V Narayanan 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 7 | 2019 |
| Recent advances in compute-in-memory support for SRAM using monolithic 3-D integration Z Zhang, X Si, S Srinivasa, AK Ramanathan, MF Chang IEEE Micro 39 (6), 28-37, 2019 | 6 | 2019 |
| Trends and opportunities for SRAM based in-memory and near-memory computation S Srinivasa, AK Ramanathan, J Sundaram, D Kurian, S Gopal, N Jain, ... 2021 22nd International Symposium on Quality Electronic Design (ISQED), 547-552, 2021 | 5 | 2021 |
| Technology-assisted computing-in-memory design for matrix multiplication workloads N Jao, S Srivinasa, A Ramanathan, M Kim, J Sampson, V Narayanan 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-6, 2019 | 4 | 2019 |
| Fusing in-storage and near-storage acceleration of convolutional neural networks I Okafor, AK Ramanathan, NR Challapalle, Z Li, V Narayanan ACM Journal on Emerging Technologies in Computing Systems 20 (1), 1-22, 2023 | 3 | 2023 |
| CiM3D: Comparator-in-memory designs using monolithic 3-D technology for accelerating data-intensive applications AK Ramanathan, SS Rangachar, HT Govindarajan, JM Hung, CY Lee, ... IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 2 | 2021 |
| Techniques to repurpose static random access memory rows to store a look-up-table for processor-in-memory operations S Jain, SR Srinivasa, AK Ramanathan, GS Kalsi, KR Pillai, S Subramoney US Patent App. 17/340,866, 2022 | 1 | 2022 |
| Achieving crash consistency by employing persistent L1 cache AK Ramanathan, SM Shahri, Y Xiao, V Narayanan 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 1 | 2022 |
| Sparse Vector-Matrix Multiplication Acceleration in Diode-Selected Crossbars N Jao, AK Ramanathan, J Sampson, V Narayanan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (12 …, 2021 | 1 | 2021 |
| Methods, apparatus, and articles of manufacture to improve in-memory multiply and accumulate operations GS Kalsi, AK Ramanathan, K Pillai, S Subramoney, SR Srinivasa, ... US Patent 11,949,414, 2024 | | 2024 |
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State UniversityVerified email at cse.psu.edu
