Eby G. Friedman

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Avinoam KolodnyProfessor of Electrical Engineering, TechnionVerified email at ee.technion.ac.il
Mikhail PopovichVerified email at google.com
Yehea IsmailProfessor, the American University in Cairo, zewail cityVerified email at aucegypt.edu
Volkan KursunAssociate Professor, The Hong Kong University of Science andVerified email at ust.hk
Shahar KvatinskyTechnion - Israel Institute of TechnologyVerified email at ee.technion.ac.il
Ioannis SavidisAssociate Professor, Drexel UniversityVerified email at coe.drexel.edu
Inna P.-VaisbandUniversity of Illinois at ChicagoVerified email at uic.edu
Uri WeiserProfessor, TechnionVerified email at ee.technion.ac.il
Selçuk KöseUniversity of RochesterVerified email at ur.rochester.edu
Guoqing ChenSMTS at AMDVerified email at amd.com
Ivan KourtevVerified email at google.com
Vasilis F. PavlidisComputer Science and University of ManchesterVerified email at cs.man.ac.uk
Emre SalmanAssociate Professor of Electrical and Computer Engineering, Stony Brook UniversityVerified email at stonybrook.edu
Engin IpekPrincipal Engineer, Qualcomm Platform ArchitectureVerified email at cs.rochester.edu
Kris GajGeorge Mason UniversityVerified email at gmu.edu
Mikhail HaurylauSr. Research Scientist, KLA-Tencor Corp.Verified email at kla-tencor.com
Magdy A. El-MoursyAssociate Professor of Microelectronics, Electronics Research InstituteVerified email at mentor.com
Siva NarendraTyfone, Inc.Verified email at tyfone.com
Vivek DeIntel Fellow, Intel CorporationVerified email at intel.com
philippe fauchetVerified email at vanderbilt.edu

Eby G. Friedman

Distinguished Professor, University of Rochester

Verified email at ece.rochester.edu - Homepage

Integrated circuits VLSI Design automation


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TEAM: Threshold adaptive memristor model S Kvatinsky, EG Friedman, A Kolodny, UC Weiser IEEE transactions on circuits and systems I: regular papers 60 (1), 211-221, 2012	594	2012
Clock distribution networks in synchronous digital integrated circuits EG Friedman Proceedings of the IEEE 89 (5), 665-692, 2001	594	2001
3-D topologies for networks-on-chip VF Pavlidis, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (10 …, 2007	538	2007
On-chip optical interconnect roadmap: Challenges and critical directions M Haurylau, G Chen, H Chen, J Zhang, NA Nelson, DH Albonesi, ... IEEE Journal of Selected Topics in Quantum Electronics 12 (6), 1699-1705, 2006	490	2006
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits YI Ismail, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (2), 195-206, 2000	487	2000
MAGIC—Memristor-aided logic S Kvatinsky, D Belousov, S Liman, G Satat, N Wald, EG Friedman, ... IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 895-899, 2014	415	2014
Memristor-based material implication (IMPLY) logic: Design principles and methodologies S Kvatinsky, G Satat, N Wald, EG Friedman, A Kolodny, UC Weiser IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2013	414	2013
Three-dimensional integrated circuit design VF Pavlidis, I Savidis, EG Friedman Newnes, 2017	374	2017
VTEAM: A general model for voltage-controlled memristors S Kvatinsky, M Ramadan, EG Friedman, A Kolodny IEEE Transactions on Circuits and Systems II: Express Briefs 62 (8), 786-790, 2015	371	2015
Figures of merit to characterize the importance of on-chip inductance YI Ismail, EG Friedman, JL Neves Proceedings of the 35th annual Design Automation Conference, 560-565, 1998	356	1998
Multi-Voltage CMOS Circuit Design V Kursun, EG Friedman Multi-Voltage CMOS Circuit Design, i-xv, 2006	338	2006
Equivalent Elmore delay for RLC trees YI Ismail, EG Friedman, JL Neves IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000	300	2000
Repeater design to reduce delay and power in resistive interconnect V Adler, EG Friedman IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1998	285	1998
Predictions of CMOS compatible on-chip optical interconnect G Chen, H Chen, M Haurylau, NA Nelson, DH Albonesi, PM Fauchet, ... Integration 40 (4), 434-446, 2007	280	2007
Power distribution networks with on-chip decoupling capacitors M Popovich, A Mezhiba, EG Friedman Springer Science & Business Media, 2007	258	2007
Closed-form expressions of 3-D via resistance, inductance, and capacitance I Savidis, EG Friedman IEEE Transactions on Electron Devices 56 (9), 1873-1881, 2009	224	2009
MRL—Memristor ratioed logic S Kvatinsky, N Wald, G Satat, A Kolodny, UC Weiser, EG Friedman 2012 13th International Workshop on Cellular Nanoscale Networks and their …, 2012	215	2012
Clock Distribution Networks VLSI Circuits and Systems EG Friedman A Selected Reprint Volume, 1995	211	1995
Dynamically tuning processor resources with adaptive processing DH Albonesi, R Balasubramonian, SG Dropsbo, S Dwarkadas, ... Computer 36 (12), 49-58, 2003	201	2003
Low-voltage-swing monolithic dc-dc conversion V Kursun, SG Narendra, VK De, EG Friedman IEEE Transactions on Circuits and Systems II: Express Briefs 51 (5), 241-248, 2004	163	2004

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