| Colour detection using a buried double pn junction structure implemented in the CMOS process GN Lu, MB Chouikha, G Sou, M Sedjil Electronics Letters 32 (6), 594-596, 1996 | 89 | 1996 |
| Photodetector based on buried junctions and a corresponding method of manufacture MB Chouikha, GN Lu, M Sejil, G Sou US Patent 5,883,421, 1999 | 53 | 1999 |
| Design and testing of a CMOS BDJ detector for integrated micro-analysis systems GN Lu, G Sou, F Devigny, G Guillaud Microelectronics journal 32 (3), 227-234, 2001 | 37 | 2001 |
| FEM method for the EEG forward problem and improvement based on modification of the saint venant's method T Medani, D Lautru, D Schwartz, Z Ren, G Sou Progress In Electromagnetics Research 153, 11-22, 2015 | 31 | 2015 |
| Colour detection using buried triple pn junction structure implemented in BiCMOS process MB Chouikha, GN Lu, M Sedjil, G Sou Electronics Letters 34 (1), 120-122, 1998 | 31 | 1998 |
| Buried triple pn junction structure in a BiCMOS technology for color detection MB Choulkha, GN Lu, M Sedjill, G Sou, G Atquie Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting, 108-111, 1997 | 31 | 1997 |
| Color-sensitive photodetectors in standard CMOS and BiCMOS technologies MB Chouikha, GN Lu, M Sedjil, G Sou Advanced Focal Plane Arrays and Electronic Cameras 2950, 108-120, 1996 | 28 | 1996 |
| Very low 1/f noise and radiation-hardened CMOS preamplifier for high-sensitivity search coil magnetometers A Rhouni, G Sou, P Leroy, C Coillot IEEE Sensors Journal 13 (1), 159-166, 2012 | 20 | 2012 |
| Investigation of CMOS BDJ detector for fluorescence detection in microarray analysis GN Lu, G Guillaud, G Sou, F Devigny, M Pitaval, P Morin 1st Annual International IEEE-EMBS Special Topic Conference on …, 2000 | 20 | 2000 |
| Very low noise multiplexing with SQUIDs and SiGe heterojunction bipolar transistors for readout of large superconducting bolometer arrays F Voisin, E Bréelle, M Piat, D Prêle, G Klisnick, G Sou, M Redon Journal of Low Temperature Physics 151 (3), 1028-1033, 2008 | 19 | 2008 |
| A CMOS op amp using a regulated-cascode transimpedance building block for high-gain, low-voltage achievement GN Lu, G Sou 1997 IEEE International Symposium on Circuits and Systems (ISCAS) 1, 165-168, 1997 | 19 | 1997 |
| Development of superconducting NbSi TES array and associated readout with SQUIDs and integrated circuit operating at 2 K D Prele, MR Piat, EL Breelle, F Voisin, M Pairat, Y Atik, B Belier, ... IEEE Transactions on Applied Superconductivity 19 (3), 501-504, 2009 | 17 | 2009 |
| 1.3 V single-stage CMOS opamp GN Lu, G Sou Electronics Letters 34 (22), 2073-2074, 1998 | 16 | 1998 |
| A low temperature 0.35 μm CMOS technology BSIM3. 3 model for space instrumentation: Application to a voltage reference design L Varizat, G Sou, M Mansour, D Alison, A Rhouni 2017 IEEE International Workshop on Metrology for AeroSpace (MetroAeroSpace …, 2017 | 15* | 2017 |
| A novel approach to implementing on-chip synchronous detection for CMOS optical detector systems GN Lu, P Pittet, G Sou, G Carrillo, AE Mourabit Analog Integrated Circuits and Signal Processing 37, 57-66, 2003 | 10 | 2003 |
| Fixed-gain CMOS differential amplifiers with no external feedback for a wide temperature range V Michal, G Klisnick, G Sou, M Redon, AJ Kreisler, AF Dégardin Cryogenics 49 (11), 615-619, 2009 | 9 | 2009 |
| CMOS linear array of BDJ color detectors MB Chouikha, GN Lu, M Sedjil, G Sou Advanced Focal Plane Arrays and Electronic Cameras II 3410, 46-53, 1998 | 9 | 1998 |
| BSIM3 parameters extraction of a 0.35 μm CMOS technology from 300K down to 77K L Varizat, G Sou, M Mansour Journal of Physics: Conference Series 834 (1), 012002, 2017 | 8 | 2017 |
| Cryogenic SiGe ASICs for readout and multiplexing of superconducting detector arrays F Voisin, D Prêle, E Bréelle, M Piat, G Sou, G Klisnick, M Redon Millimeter and Submillimeter Detectors and Instrumentation for Astronomy IV …, 2008 | 8 | 2008 |
| Standard sige technologies operating at 4 k for front-end readout of SQUID arrays D Prêle, G Klisnick, G Sou, M Redon, F Voisin, E Bréelle, M Piat 2006 8th International Conference on Solid-State and Integrated Circuit …, 2006 | 8 | 2006 |
