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Reetuparna Das
Reetuparna Das
Verified email at umich.edu
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Scalpel: Customizing dnn pruning to the underlying hardware parallelism
J Yu, A Lukefahr, D Palframan, G Dasika, R Das, S Mahlke
ACM SIGARCH Computer Architecture News 45 (2), 548-560, 2017
4812017
Neural cache: Bit-serial in-cache acceleration of deep neural networks
C Eckert, X Wang, J Wang, A Subramaniyan, R Iyer, D Sylvester, ...
2018 ACM/IEEE 45Th annual international symposium on computer architecture …, 2018
4582018
Compute caches
S Aga, S Jeloka, A Subramaniyan, S Narayanasamy, D Blaauw, R Das
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
3932017
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ...
Proceedings of the 34th annual international symposium on Computer …, 2007
3642007
MIRA: A multi-layered on-chip interconnect router architecture
D Park, S Eachempati, R Das, AK Mishra, Y Xie, N Vijaykrishnan, CR Das
ACM SIGARCH Computer Architecture News 36 (3), 251-261, 2008
3012008
Application-aware prioritization mechanisms for on-chip networks
R Das, O Mutlu, T Moscibroda, CR Das
Proceedings of the 42nd annual IEEE/ACM international symposium on …, 2009
2682009
Aergia: Exploiting packet latency slack in on-chip networks
R Das, O Mutlu, T Moscibroda, CR Das
ACM SIGARCH computer architecture news 38 (3), 106-116, 2010
2612010
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
R Das, S Eachempati, AK Mishra, V Narayanan, CR Das
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
2552009
ANVIL: Software-based protection against next-generation rowhammer attacks
ZB Aweke, SF Yitbarek, R Qiao, R Das, M Hicks, Y Oren, T Austin
ACM SIGPLAN Notices 51 (4), 743-755, 2016
2432016
Composite cores: Pushing heterogeneity into a core
A Lukefahr, S Padmanabha, R Das, FM Sleiman, R Dreslinski, ...
2012 45th annual IEEE/ACM international symposium on microarchitecture, 317-328, 2012
2252012
Catnap: Energy proportional multiple network-on-chip
R Das, S Narayanasamy, SK Satpathy, RG Dreslinski
Proceedings of the 40th annual international symposium on Computer …, 2013
2042013
In-memory data parallel processor
D Fujiki, S Mahlke, R Das
ACM SIGPLAN Notices 53 (2), 1-14, 2018
1822018
A 28-nm compute SRAM with bit-serial logic/arithmetic operations for programmable in-memory vector computing
J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ...
IEEE Journal of Solid-State Circuits 55 (1), 76-86, 2019
1732019
Application-to-core mapping policies to reduce memory system interference in multi-core systems
R Das, R Ausavarungnirun, O Mutlu, A Kumar, M Azimi
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
1502013
A case for dynamic frequency tuning in on-chip networks
AK Mishra, R Das, S Eachempati, R Iyer, N Vijaykrishnan, CR Das
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
1482009
Duality cache for data parallel acceleration
D Fujiki, S Mahlke, R Das
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
1342019
Performance and power optimization through data compression in network-on-chip architectures
R Das, AK Mishra, C Nicopoulos, D Park, V Narayanan, R Iyer, MS Yousif, ...
2008 IEEE 14th International Symposium on High Performance Computer …, 2008
1322008
14.2 A compute SRAM with bit-serial integer/floating-point operations for programmable in-memory vector acceleration
J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 224-226, 2019
1282019
Power-aware NoCs through routing and topology reconfiguration
R Parikh, R Das, V Bertacco
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
1182014
GenAx: A genome sequencing accelerator
D Fujiki, A Subramaniyan, T Zhang, Y Zeng, R Das, D Blaauw, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
1132018
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