| Logic design within memristive memories using memristor-aided loGIC (MAGIC) N Talati, S Gupta, P Mane, S Kvatinsky IEEE Transactions on Nanotechnology 15 (4), 635-650, 2016 | 358 | 2016 |
| Power-and area-efficient approximate wallace tree multiplier for error-resilient systems K Bhardwaj, PS Mane, J Henkel Fifteenth international symposium on quality electronic design, 263-269, 2014 | 224 | 2014 |
| ACMA: Accuracy-configurable multiplier architecture for error-resilient system-on-chip K Bhardwaj, PS Mane 2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013 | 47 | 2013 |
| Implementation of RISC Processor on FPGA PS Mane, I Gupta, MK Vasantha 2006 IEEE International Conference on Industrial Technology, 2096-2100, 2006 | 31 | 2006 |
| C3Map and ARPSO based mapping algorithms for energy-efficient regular 3-D NoC architectures K Bhardwaj, PS Mane Technical papers of 2014 international symposium on VLSI design, automation …, 2014 | 22 | 2014 |
| Hybrid CMOS-memristor based FPGA architecture M Sampath, PS Mane, CK Ramesha 2015 International Conference on VLSI Systems, Architecture, Technology and …, 2015 | 20 | 2015 |
| Implementing Quality by Design-A methodical approach in the RP-HPLC method development process A Ayre, P Mane, K Ghude, M Nemade, P Gide Int. J. Adv. Pharm. Anal 4 (1), 1-6, 2014 | 16 | 2014 |
| Stateful-NOR based reconfigurable architecture for logic implementation P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha Microelectronics Journal 46 (6), 551-562, 2015 | 12 | 2015 |
| Implementation of NOR logic based on material implication on CMOL FPGA architecture P Mane, N Talati, A Riswadkar, B Jasani, CK Ramesha 2015 28th International Conference on VLSI Design, 523-528, 2015 | 10 | 2015 |
| Cognitive Approximate Adder Design for Image Processing Applications V Joshi, P Mane, CK Ramesha 2023 International Conference on Recent Trends in Electronics and …, 2023 | 5 | 2023 |
| Reconfiguration on nanocrossbar using material implication P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha Sādhanā 42 (1), 33-44, 2017 | 3 | 2017 |
| Hybrid CMOS-Memristor based configurable logic block design PS Mane, N Paul, N Behera, M Sampath, CK Ramesha 2014 International Conference on Electronics and Communication Systems …, 2014 | 3 | 2014 |
| Truncation Based Approximate Multiplier For Error Resilient Applications P Parekh, S Mehta, P Mane International Journal of Electronics Letters 10 (3), 296-307, 2022 | 2 | 2022 |
| Color Analysis and Classification Based on Machine Learning Technique Using RGB Camera Industrial Practice and Experience Paper PS Vitthal, S Balasubramanian, PS Mane 2017 IEEE International Conference on Computational Intelligence and …, 2017 | 2 | 2017 |
| Energy-Efficient Approximate Arithmetic Circuit Design for Error Resilient Applications V Joshi, P Mane Proceedings of the International Conference on Paradigms of Computing …, 2023 | 1 | 2023 |
| Design of Voltage Amplifiers with optimization of Multiple Design Parameters PS Vitthal, A Basak, PS Mane 2018 4th International Conference on Devices, Circuits and Systems (ICDCS …, 2018 | 1 | 2018 |
| Adder implementation in reconfigurable resistive switching crossbar P Mane, S Mishra, R Deliwala, CK Ramesha 2017 18th International Symposium on Quality Electronic Design (ISQED), 403-408, 2017 | | 2017 |
| Reconfigurable Architecture in Resistive Switching Crossbar PS Mane BITS, Pilani, 2016 | | 2016 |
| Implicating logic functions with memristors P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha 2014 International SoC Design Conference (ISOCC), 232-233, 2014 | | 2014 |
| Memristor: A New Step Towards System Stability and Performance S Garg, P Mane International Journal of Engineering Research 3 (2), 2014 | | 2014 |
