Gianluca Durelli
Gianluca Durelli
Vahvistettu sähköpostiosoite verkkotunnuksessa - Kotisivu
Floorplanning automation for partial-reconfigurable fpgas via feasible placements generation
M Rabozzi, GC Durelli, A Miele, J Lillis, MD Santambrogio
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 151-164, 2016
On how to extract breathing rate from PPG signal using wearable devices
A Fusco, D Locatelli, F Onorati, GC Durelli, MD Santambrogio
2015 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2015
Workload-aware power optimization strategy for asymmetric multiprocessors
E Del Sozzo, GC Durelli, EMG Trainiti, A Miele, MD Santambrogio, ...
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2016
On how to improve fpga-based systems design productivity via sdaccel
G Guidi, E Reggiani, L Di Tucci, G Durelli, M Blott, MD Santambrogio
2016 IEEE international parallel and distributed processing symposium …, 2016
Accuracy to throughput trade-offs for reduced precision neural networks on reconfigurable logic
J Su, NJ Fraser, G Gambardella, M Blott, G Durelli, DB Thomas, ...
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018
Para-sched: A reconfiguration-aware scheduler for reconfigurable architectures
R Cattaneo, R Bellini, G Durelli, C Pilato, MD Santambrogio, D Sciuto
2014 IEEE International Parallel & Distributed Processing Symposium …, 2014
The autonomic operating system research project: achievements and future directions
DB Bartolini, R Cattaneo, GC Durelli, M Maggio, MD Santambrogio, ...
Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013
Hardware design automation of convolutional neural networks
A Solazzo, E Del Sozzo, I De Rose, M De Silvestri, GC Durelli, ...
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 224-229, 2016
A runtime controller for OpenCL applications on heterogeneous system architectures
C Bolchini, S Cherubin, GC Durelli, S Libutti, A Miele, MD Santambrogio
ACM SIGBED Review 15 (1), 29-35, 2018
On the automatic integration of hardware accelerators into FPGA-based embedded systems
C Pilato, A Cazzaniga, G Durelli, A Otero, D Sciuto, MD Santambrogio
Field Programmable Logic and Applications (FPL), 2012 22nd International …, 2012
Automatic run-time manager generation for reconfigurable MPSoC architectures
G Durelli, C Pilato, A Cazzaniga, D Sciuto, MD Santambrogio
7th International Workshop on Reconfigurable and Communication-Centric …, 2012
Towards exascale computing with heterogeneous architectures
K O'Brien, L Di Tucci, G Durelli, M Blott
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
Save: Towards efficient resource management in heterogeneous system architectures
G Durelli, M Coppola, K Djafarian, G Kornaros, A Miele, M Paolino, O Pell, ...
Reconfigurable Computing: Architectures, Tools, and Applications: 10th …, 2014
Smart technologies for effective reconfiguration: The faster approach
MD Santambrogio, D Pnevmatikatos, K Papadimitriou, C Pilato, ...
7th International Workshop on Reconfigurable and Communication-Centric …, 2012
Using just-in-time code generation for transparent resource management in heterogeneous systems
H Riebler, G Vaz, C Plessl, EMG Trainiti, GC Durelli, E Del Sozzo, ...
2016 IEEE 2nd International Forum on Research and Technologies for Society …, 2016
Smash: A heuristic methodology for designing partially reconfigurable mpsocs
R Cattaneo, C Pilato, GC Durelli, MD Santambrogio, D Sciuto
2013 International Symposium on Rapid System Prototyping (RSP), 102-108, 2013
Software implementation and hardware acceleration of retinal vessel segmentation for diabetic retinopathy screening tests
L Cavinato, I Fidone, M Bacis, E Del Sozzo, GC Durelli, MD Santambrogio
2017 39th Annual International Conference of the IEEE Engineering in …, 2017
On the design of autonomic techniques for runtime resource management in heterogeneous systems
Politecnico di Milano, 2016
An orchestrated approach to efficiently manage resources in heterogeneous system architectures
C Bolchini, GC Durelli, A Miele, G Pallotta, MD Santambrogio
2015 33rd IEEE International Conference on Computer Design (ICCD), 200-207, 2015
Runtime resource management in heterogeneous system architectures: The save approach
GC Durelli, M Pogliani, A Miele, C Plessl, H Riebler, MD Santambrogio, ...
2014 IEEE International Symposium on Parallel and Distributed Processing …, 2014
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