Runtime programmable and memory bandwidth optimized FPGA-based coprocessor for deep convolutional neural network N Shah, P Chaudhari, K Varghese IEEE Transactions on Neural Networks and Learning Systems 29 (12), 5922-5934, 2018 | 61 | 2018 |
Problp: A framework for low-precision probabilistic inference N Shah, LIG Olascoaga, W Meert, M Verhelst Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 23 | 2019 |
Towards hardware-aware tractable learning of probabilistic models LI Galindez Olascoaga, W Meert, N Shah, M Verhelst, G Van den Broeck Advances in Neural Information Processing Systems 32, 2019 | 23 | 2019 |
Acceleration of probabilistic reasoning through custom processor architecture N Shah, LIG Olascoaga, W Meert, M Verhelst 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 322-325, 2020 | 17 | 2020 |
DPU: DAG processing unit for irregular graphs with precision-scalable posit arithmetic in 28 nm N Shah, LIG Olascoaga, S Zhao, W Meert, M Verhelst IEEE Journal of Solid-State Circuits 57 (8), 2586-2596, 2021 | 15 | 2021 |
9.4 piu: A 248gops/w stream-based processor for irregular probabilistic inference networks using precision-scalable posit arithmetic in 28nm N Shah, LIG Olascoaga, S Zhao, W Meert, M Verhelst 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 150-152, 2021 | 11 | 2021 |
DPU-v2: Energy-efficient execution of irregular directed acyclic graphs N Shah, W Meert, M Verhelst 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022 | 8 | 2022 |
GraphOpt: Constrained-Optimization-Based Parallelization of Irregular Graphs N Shah, W Meert, M Verhelst IEEE Transactions on Parallel and Distributed Systems 33 (12), 3321-3332, 2022 | 8 | 2022 |
Discriminative bias for learning probabilistic sentential decision diagrams LI Galindez Olascoaga, W Meert, N Shah, G Van den Broeck, M Verhelst Advances in Intelligent Data Analysis XVIII: 18th International Symposium on …, 2020 | 5 | 2020 |
Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co-optimization for Probabilistic AI and Sparse Linear Algebra N Shah, W Meert, M Verhelst Springer Nature, 2023 | 4 | 2023 |
On hardware-aware probabilistic frameworks for resource constrained embedded applications LIG Olascoaga, W Meert, N Shah, G Van den Broeck, M Verhelst 2019 Fifth Workshop on Energy Efficient Machine Learning and Cognitive …, 2019 | 4 | 2019 |
Discrete samplers for approximate inference in probabilistic machine learning S Zhao, N Shah, W Meert, M Verhelst 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 3 | 2022 |
Dynamic complexity tuning for hardware-aware probabilistic circuits LI Galindez Olascoaga, W Meert, N Shah, M Verhelst IoT Streams for Data-Driven Predictive Maintenance and IoT, Edge, and Mobile …, 2020 | 3 | 2020 |
Pru: Probabilistic reasoning processing unit for resource-efficient ai NS Shah, LI Galindez Olascoaga, W Meert, M Verhelst Hot Chips: A Symposium on High Performance Chips, Date: 2019/08/18-2019/08 …, 2019 | 1 | 2019 |
Efficient Execution of Irregular Dataflow Graphs N Shah, W Meert, M Verhelst | 1 | |
AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing S Zhao, N Shah, W Meert, M Verhelst 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 29-32, 2024 | | 2024 |
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis GM Sarda, N Shah, D Bhattacharjee, P Debacker, M Verhelst 2023 IEEE International Symposium on Workload Characterization (IISWC), 226-228, 2023 | | 2023 |
Suitable Data Representation: A Study of Fixed-Point, Floating-Point, and PositTM Formats for Probabilistic AI N Shah, W Meert, M Verhelst Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co …, 2023 | | 2023 |
GraphOpt: Constrained-Optimization- Based Parallelization of Irregular Workloads for Multicore Processors N Shah, W Meert, M Verhelst Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co …, 2023 | | 2023 |
DAG Processing Unit Version 1 (DPU): Efficient Execution of Irregular Workloads on a Multicore Processor N Shah, W Meert, M Verhelst Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co …, 2023 | | 2023 |