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sheyang ning
sheyang ning
University of Tokyo
Verified email at takeuchi-lab.org
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Year
Investigation and improvement of verify-program in carbon nanotube-based nonvolatile memory
S Ning, TO Iwasaki, K Shimomura, K Johguchi, E Yanagizawa, ...
IEEE Transactions on Electron Devices 62 (9), 2837-2844, 2015
172015
19.6 Hybrid storage of ReRAM/TLC NAND Flash with RAID-5/6 for cloud data centers
S Tanakamaru, H Yamazawa, T Tokutomi, S Ning, K Takeuchi
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
162014
Control gate length, spacing, channel hole diameter, and stacked layer number design for bit-cost scalable-type three-dimensional stackable NAND flash memory
K Miyaji, Y Yanagihara, R Hirasawa, S Ning, K Takeuchi
Japanese Journal of Applied Physics 53 (2), 024201, 2014
142014
Write stress reduction in 50nm AlxOyReRAM improves endurance 1.4× and write time, energy by 17%
S Ning, TO Iwasaki, K Takeuchi
2013 5th IEEE International Memory Workshop, 56-59, 2013
132013
Adaptive comparator bias-current control of 0.6 V input boost converter for ReRAM program voltages in low power embedded applications
T Ishii, S Ning, M Tanaka, K Tsurumi, K Takeuchi
IEEE Journal of Solid-State Circuits 51 (10), 2389-2397, 2016
122016
Stability conditioning to enhance read stability 10x in 50nm AlxOy ReRAM
TO Iwasaki, S Ning, K Takeuchi
2013 5th IEEE International Memory Workshop, 44-47, 2013
122013
Advanced bit flip concatenates BCH code demonstrates 0.93% correctable BER and faster decoding on (36 864, 32 768) emerging memories
S Ning
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (12), 4404-4412, 2018
112018
50 nm AlxOy ReRAM program 31% energy, 1.6× endurance, and 3.6× speed improvement by advanced cell condition adaptive verify-reset
S Ning, TO Iwasaki, K Takeuchi
Solid-State Electronics 103, 64-72, 2015
112015
50 nm AlxOy resistive random access memory array program bit error reduction and high temperature operation
S Ning, TO Iwasaki, K Takeuchi
Japanese Journal of Applied Physics 53 (4S), 04ED09, 2014
102014
Machine learning prediction for 13x endurance enhancement in reram ssd system
TO Iwasaki, S Ning, H Yamazawa, C Sun, S Tanakamaru, K Takeuchi
2015 IEEE International Memory Workshop (IMW), 1-4, 2015
92015
23% faster program and 40% energy reduction of carbon nanotube non-volatile memory with over 1011 endurance
S Ning, TO Iwasaki, K Shimomura, K Johguchi, G Rosendale, M Manning, ...
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014
92014
Quick-low-density parity check and dynamic threshold voltage optimization in 1X nm triple-level cell NAND flash memory with comprehensive analysis of endurance, retention-time …
M Doi, T Tokutomi, S Hachiya, A Kobayashi, S Tanakamaru, S Ning, ...
Japanese Journal of Applied Physics 55 (8), 084201, 2016
72016
Reset-check-reverse-flag scheme on NRAM with 50% bit error rate or 35% parity overhead and 16% decoding latency reductions for read-intensive storage class memory
S Ning, TO Iwasaki, S Tanakamaru, D Viviani, H Huang, M Manning, ...
IEEE Journal of Solid-State Circuits 51 (8), 1938-1951, 2016
72016
Improving resistive RAM hard and soft decision correctable BERs by using improved-LLR and reset-check-reverse-flag concatenating LDPC code
S Ning
IEEE Transactions on Circuits and Systems II: Express Briefs 67 (10), 2164-2168, 2019
62019
Design methodology for highly reliable, high performance ReRAM and 3-bit/cell MLC NAND flash solid-state storage
S Tanakamaru, H Yamazawa, T Tokutomi, S Ning, K Takeuchi
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (3), 844-853, 2014
62014
Carbon nanotube memory cell array program error analysis and tradeoff between reset voltage and verify pulses
S Ning, TO Iwasaki, S Hachiya, G Rosendale, M Manning, D Viviani, ...
Japanese Journal of Applied Physics 55 (4S), 04EE01, 2016
52016
Devices and methods for programming resistive change elements
J Luo, N Sheyang, LE Cleveland
US Patent 10,446,228, 2019
42019
Methods for error correction with resistive change element arrays
N Sheyang
US Patent 10,387,244, 2019
42019
Resistive change element cells sharing selection devices
J Luo, N Sheyang, SM Heh
US Patent 10,825,516, 2020
32020
Trade-off of performance, reliability and cost of SCM/NAND flash hybrid SSD
H Takishita, S Ning, K Takeuchi
2015 Silicon Nanoelectronics Workshop (SNW), 1-2, 2015
32015
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