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Anahita Shayesteh
Anahita Shayesteh
UCLA, Intel, Samsung, Luminous Computing
Verified email at cs.ucla.edu - Homepage
Title
Cited by
Cited by
Year
Performance analysis of NVMe SSDs and their implication on real world databases
Q Xu, H Siyamwala, M Ghosh, T Suri, M Awasthi, Z Guz, A Shayesteh, ...
Proceedings of the 8th ACM International Systems and Storage Conference, 1-11, 2015
1952015
NVMe-over-fabrics performance characterization and the path to low-overhead flash disaggregation
Z Guz, H Li, A Shayesteh, V Balakrishnan
Proceedings of the 10th ACM International Systems and Storage Conference, 1-9, 2017
622017
SIMD divergence optimization through intra-warp compaction
AS Vaidya, A Shayesteh, DH Woo, R Saharoy, M Azimi
Proceedings of the 40th Annual International Symposium on Computer …, 2013
532013
Compressing execution cycles for divergent execution in a single instruction multiple data (SIMD) processor
AS Vaidya, A Shayesteh, DH Woo, S Saharoy, M Azimi
US Patent 9,606,797, 2017
352017
Performance characterization of nvme-over-fabrics storage disaggregation
Z Guz, H Li, A Shayesteh, V Balakrishnan
ACM Transactions on Storage (TOS) 14 (4), 1-18, 2018
342018
Replacing cache lines in a cache memory based at least in part on cache coherency state information
N Cherukuri, DW Brzezinski, IT Schoinas, A Shayesteh, A Kumar, M Azimi
US Patent 8,990,506, 2015
322015
Scaling the issue window with look-ahead latency prediction
Y Liu, A Shayesteh, G Memik, G Reinman
Proceedings of the 18th Annual international Conference on Supercomputing …, 2004
312004
Performance characterization of hyperscale applicationson on nvme ssds
Q Xu, H Siyamwala, M Ghosh, M Awasthi, T Suri, Z Guz, A Shayesteh, ...
Proceedings of the 2015 ACM SIGMETRICS International Conference on …, 2015
252015
Low-overhead core swapping for thermal management
E Kursun, G Reinman, S Sair, A Shayesteh, T Sherwood
Power-Aware Computer Systems: 4th International Workshop, PACS 2004 …, 2005
252005
Reducing the latency and area cost of core swapping through shared helper engines
A Shayesteh, E Kursun, T Sherwood, S Sair, G Reinman
2005 International Conference on Computer Design, 17-23, 2005
192005
Real-time analytics as the killer application for processing-in-memory
Z Guz, M Awasthi, V Balakrishnan, M Ghosh, A Shayesteh, T Suri, ...
Near Data Processing (WoNDP), 10-2, 2014
182014
System-level characterization of datacenter applications
M Awasthi, T Suri, Z Guz, A Shayesteh, M Ghosh, V Balakrishnan
Proceedings of the 6th ACM/SPEC International Conference on Performance …, 2015
172015
Automatic I/O stream selection for storage devices
S Hassani, A Shayesteh, V Balakrishnan
US Patent 10,296,264, 2019
122019
Tornado warning: the perils of selective replay in multithreaded processors
Y Liu, A Shayesteh, G Memik, G Reinman
Proceedings of the 19th annual international conference on Supercomputing, 51-60, 2005
112005
Method for NVMe SSD based storage service using RPC and gRPC tunneling over PCIe+
RP Kachare, GUZ Zvi, A Shayesteh, X Yao, OP PINTO
US Patent 10,846,155, 2020
82020
Improving the performance and power efficiency of shared helpers in CMPs
A Shayesteh, G Reinman, N Jouppi, T Sherwood, S Sair
Proceedings of the 2006 international conference on Compilers, architecture …, 2006
72006
Harry (Huan) Li, Anahita Shayesteh, and Vijay Balakrishnan. NVMe-over-fabrics performance characterization and the path to low-overhead flash disaggregation
Z Guz
ACM SYSTOR 10 (3078468.3078483), 2017
62017
Dynamically configurable shared cmp helper engines for improved performance
A Shayesteh, G Reinman, N Jouppi, S Sair, T Sherwood
ACM SIGARCH Computer Architecture News 33 (4), 70-79, 2005
62005
The Calm Before the Storm: Reducing Replays in the Cyclone Scheduler
Y Liu, A Shayesteh, G Memik, G Reinman
Proc. of P= ac2: First Watson Conference on Interaction between Architecture …, 2004
62004
Modeling analytics for computational storage
V Lagrange Moutinho dos Reis, H Li, A Shayesteh
Proceedings of the ACM/SPEC International Conference on Performance …, 2020
52020
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Articles 1–20