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Arijit Mondal
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Efficient coding architectures for Reed–Solomon and low-density parity-check decoders for magnetic and other data storage systems
A Mondal, S Thatimattala, VK Yalamaddi, SS Garani
IEEE Transactions on Magnetics 54 (2), 1-15, 2018
162018
Efficient Hardware Architectures for 2-D BCH Codes in the Frequency Domain for Two-Dimensional Data Storage Applications
A Mondal, SS Garani
IEEE Transactions on Magnetics 57 (5), 1-14, 2021
82021
Efficient hardware design architectures for BCH product codes in the frequency domain
A Mondal, SS Garani
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems …, 2020
52020
Quantum Circuits for Stabilizer Error Correcting Codes: A Tutorial
A Mondal, KK Parhi
IEEE Circuits and Systems Magazine 24 (1), 33-51, 2024
42024
A Low-complexity Hardware AWGN Channel Emulator on FPGA using Central Limit Theorem
AB Nair, A Mondal, SS Garani
2018 IEEE 61st International Midwest Symposium on Circuits and Systems …, 2018
42018
A fast and efficient two-dimensional Chien search algorithm and design architecture
S Roy, A Mondal, SS Garani
IEEE Communications Letters 23 (1), 16-19, 2018
32018
Efficient Parallel Decoding Architecture for Cluster Erasure Correcting 2-D LDPC Codes for 2-D Data Storage
A Mondal, SS Garani
IEEE Transactions on Magnetics 57 (12), 1-16, 2021
22021
Systematic Design and Optimization of Quantum Circuits for Stabilizer Codes
A Mondal, KK Parhi
arXiv preprint arXiv:2309.12373, 2023
12023
Efficient Hardware Architectures for Error Correcting Codes Applicable to Data Storage
A Mondal
12022
Optimization of Quantum Circuits for Stabilizer Codes
A Mondal, KK Parhi
IEEE Transactions on Circuits and Systems I: Regular Papers, 2024
2024
An Improved Codec Design Architecture for Irregular LDPC Codes Applicable to WiMAX
D Shri, A Mondal, SS Garani
2022 29th IEEE International Conference on Electronics, Circuits and Systems …, 2022
2022
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